Rezaul Haque

Orcid: 0000-0002-9922-8632

According to our database1, Rezaul Haque authored at least 6 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
On-chip charge pump design for 3D non-volatile flash memory: from industry perspective.
Integr., January, 2024

2023
Data-Driven Solution to Identify Sentiments from Online Drug Reviews.
Comput., April, 2023


2021
A 1Tb 4b/Cell 144-Tier Floating-Gate 3D-NAND Flash Memory with 40MB/s Program Throughput and 13.8Gb/mm<sup>2</sup> Bit Density.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2007
Design of a flash-based reference voltage generator for drain bias circuit.
IET Circuits Devices Syst., 2007

2006
Design of a high-speed, low-noise CMOS data output buffer.
Integr., 2006


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