Reza Rezaeian Farashahi
Orcid: 0000-0003-0063-3484
According to our database1,
Reza Rezaeian Farashahi
authored at least 35 papers
between 2006 and 2024.
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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Bibliography
2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
2023
Finite Fields Their Appl., March, 2023
2020
Des. Codes Cryptogr., 2020
2018
Proceedings of the Selected Areas in Cryptography - SAC 2018, 2018
2017
High-performance and high-speed implementation of polynomial basis Itoh-Tsujii inversion algorithm over GF(2<i> <sup>m</sup> </i>).
IET Inf. Secur., 2017
Full-custom hardware implementation of point multiplication on binary Edwards curves for application-specific integrated circuit elliptic curve cryptosystem applications.
IET Circuits Devices Syst., 2017
Efficient and low-complexity hardware architecture of Gaussian normal basis multiplication over GF(2<i> <sup>m</sup> </i>) for elliptic curve cryptosystems.
IET Circuits Devices Syst., 2017
High-speed Hardware Implementations of Point Multiplication for Binary Edwards and Generalized Hessian Curves.
IACR Cryptol. ePrint Arch., 2017
Proceedings of the Information Security and Privacy - 22nd Australasian Conference, 2017
2016
High-speed hardware architecture of scalar multiplication for binary elliptic curve cryptosystems.
Microelectron. J., 2016
An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2<sup>m</sup>).
Integr., 2016
Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2<i> <sup>m</sup> </i>).
IET Comput. Digit. Tech., 2016
High-speed VLSI implementation of Digit-serial Gaussian normal basis Multiplication over GF(2m).
IACR Cryptol. ePrint Arch., 2016
Finite Fields Their Appl., 2016
2015
Efficient implementation of low time complexity and pipelined bit-parallel polynomial basis multiplier over binary finite fields.
ISC Int. J. Inf. Secur., 2015
Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems.
IACR Cryptol. ePrint Arch., 2015
2014
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm.
Microelectron. J., 2014
High-speed and pipelined finite field bit-parallel multiplier over GF(2<sup>m</sup>) for elliptic curve cryptosystems.
Proceedings of the 11th International ISC Conference on Information Security and Cryptology, 2014
2013
Math. Comput., 2013
2012
IACR Cryptol. ePrint Arch., 2012
Finite Fields Their Appl., 2012
Exp. Math., 2012
Proceedings of the Selected Areas in Cryptography, 19th International Conference, 2012
2010
Des. Codes Cryptogr., 2010
Proceedings of the Public Key Cryptography, 2010
2009
2008
Efficient arithmetic on elliptic curves using a mixed Edwards-Montgomery representation.
IACR Cryptol. ePrint Arch., 2008
Proceedings of the Information Security and Privacy, 13th Australasian Conference, 2008
2007
Proceedings of the Arithmetic of Finite Fields, First International Workshop, 2007
Proceedings of the Cryptography and Coding, 2007
2006
IACR Cryptol. ePrint Arch., 2006