Reza Mirosanlou

Orcid: 0000-0002-0945-1671

According to our database1, Reza Mirosanlou authored at least 9 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs.
ACM Trans. Embed. Comput. Syst., 2023

X-Stream: Accelerating streaming segments on MPSoCs for real-time applications.
J. Syst. Archit., 2023

2022
Parallelism-Aware High-Performance Cache Coherence with Tight Latency Bounds.
Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

2021
DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance.
Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021

Duetto: Latency Guarantees at Minimal Performance Cost.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
MCsim: An Extensible DRAM Memory Controller Simulator.
IEEE Comput. Archit. Lett., 2020

DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

2019
3DCAM: A Low Overhead Crosstalk Avoidance Mechanism for TSV-Based 3D ICs.
CoRR, 2019

Designing Mixed Criticality Applications on Modern Heterogeneous MPSoC Platforms.
Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019


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