Reza Hashemian
Orcid: 0000-0002-0028-7078
According to our database1,
Reza Hashemian
authored at least 36 papers
between 1990 and 2024.
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Bibliography
2024
Extended "A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits".
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024
2022
Quick Access to Circuit Transfer Functions via NAM Determinant/Cofactors Using UaL Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
Application of Nullors in Symbolic Single Port Transfer Functions Using Admittance Method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
s-Expanded Transfer Function using UaL Decomposition with Convolution & Deconvolution.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Constructing Circuit Transfer Functions directly from the State Equations, Using Convolutions.
Proceedings of the 2020 IEEE International Conference on Electro Information Technology, 2020
2019
Design of Analog Circuits for Continuously Changing Constraints Using Fixator Norator Pairs.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
Amplifier Design for Specified Frequency Response Profiles Using Nullors-Hearing Aids, a Case Study.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Microelectron. J., 2018
Fixator-Norator Pair Based Design of Feedback Networks for Analog Amplifier Circuits.
J. Circuits Syst. Comput., 2018
A Comprehensive Nodal/Branch Circuit Analysis Including Fixator-Norator Pairs in Analog Circuits.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Identifying and 3D Displaying Poles and Zeros in Analog Circuit Transfer Functions: Bode Surfaces.
Circuits Syst. Signal Process., 2017
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
2016
Finding poles and zeros in an analog circuit directly from its conductance matrix using eigenvalues.
Comput. Electr. Eng., 2016
RC and RL to LC circuit conversion, and its application in poles and zeros identification.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electro Information Technology, 2016
2015
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Identification and extraction of all real axis poles and zeros in RC and RL circuits.
Proceedings of the IEEE International Conference on Electro/Information Technology, 2015
2014
IEEE Trans. Circuits Syst. II Express Briefs, 2014
Fixator-Norator Pairs Versus Direct Analytical Tools in Performing Analog Circuit Designs.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
vLab, a high speed multi-accesses parallel processing remote laboratory access for FPGA design technology.
Proceedings of the IEEE International Conference on Electro/Information Technology, 2014
2012
Application of Fixator-Norator Pairs in Designing Active Loads and Current Mirrors in Analog Integrated Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2012
2010
VLSI Design, 2010
2008
Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008
2007
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007
2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2004
IEEE Trans. Commun., 2004
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004
2003
Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003
1995
1994
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994
1993
High speed search and memory efficient Huffman coding.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
An alternative algorithm for high speed multiplication and addition using growing technique.
Proceedings of the Second Great Lakes Symposium on VLSI, 1992
1990
IEEE Trans. Computers, 1990
Parallel Addition Using Pipeline Structure.
Proceedings of the 1990 International Conference on Parallel Processing, 1990