Reza Azarderakhsh
Orcid: 0000-0002-6921-6868Affiliations:
- Florida Atlantic University, Boca Raton, FL, USA
- PQSecure Technologies
- University of Western Ontario, Canada (former)
According to our database1,
Reza Azarderakhsh
authored at least 155 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
Efficient Error Detection Cryptographic Architectures Benchmarked on FPGAs for Montgomery Ladder.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024
Hardware Constructions for Error Detection in WG-29 Stream Cipher Benchmarked on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2024
IEEE Trans. Very Large Scale Integr. Syst., March, 2024
ACM Trans. Embed. Comput. Syst., March, 2024
Efficient Algorithm Level Error Detection for Number-Theoretic Transform Assessed on FPGAs.
CoRR, 2024
Efficient Fault Detection Architectures for Modular Exponentiation Targeting Cryptographic Applications Benchmarked on FPGAs.
CoRR, 2024
Proceedings of the Applied Cryptography and Network Security Workshops, 2024
2023
Error Detection Architectures for Hardware/Software Co-Design Approaches of Number-Theoretic Transform.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA.
ACM J. Emerg. Technol. Comput. Syst., January, 2023
Reliable Architectures for Finite Field Multipliers Using Cyclic Codes on FPGA Utilized in Classic and Post-Quantum Cryptography.
IEEE Trans. Very Large Scale Integr. Syst., 2023
Error Detection Constructions for ITA Finite Field Inversions Over $\text{GF}(2^{m})$ on FPGA Using CRC and Hamming Codes.
IEEE Trans. Reliab., 2023
Error Detection Schemes Assessed on FPGA for Multipliers in Lattice-Based Key Encapsulation Mechanisms in Post-Quantum Cryptography.
IEEE Trans. Emerg. Top. Comput., 2023
Time-Efficient Finite Field Microarchitecture Design for Curve448 and Ed448 on Cortex-M4.
IACR Cryptol. ePrint Arch., 2023
ChatGPT vs. Lightweight Security: First Work Implementing the NIST Cryptographic Standard ASCON.
CoRR, 2023
Algorithmic Security is Insufficient: A Comprehensive Survey on Implementation Attacks Haunting Post-Quantum Security.
CoRR, 2023
A Comprehensive Survey on the Implementations, Attacks, and Countermeasures of the Current NIST Lightweight Cryptography Standard.
CoRR, 2023
Proceedings of the Science of Cyber Security - 5th International Conference, 2023
Reliable Code-Based Post-Quantum Cryptographic Algorithms through Fault Detection on FPGA.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
Covert and Quantum-Safe Tunneling of Multi-Band Military-RF Communication Waveforms Through Non-Cooperative 5G Networks.
Proceedings of the IEEE Military Communications Conference, 2023
Highly Optimized Curve448 and Ed448 design in wolfSSL and Side-Channel Evaluation on Cortex-M4.
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2023
A Flexible Shared Hardware Accelerator for NIST-Recommended Algorithms CRYSTALS-Kyber and CRYSTALS-Dilithium with SCA Protection.
Proceedings of the Topics in Cryptology - CT-RSA 2023, 2023
2022
Efficient Error Detection Architectures for Postquantum Signature Falcon's Sampler and KEM SABER.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Hardware Constructions for Error Detection in Lightweight Welch-Gong (WG)-Oriented Streamcipher WAGE Benchmarked on FPGA.
IEEE Trans. Emerg. Top. Comput., 2022
Hardware Constructions for Lightweight Cryptographic Block Cipher QARMA With Error Detection Mechanisms.
IEEE Trans. Emerg. Top. Comput., 2022
Hardware Constructions for Error Detection in Lightweight Authenticated Cipher ASCON Benchmarked on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Proceedings of the Information Security Applications - 23rd International Conference, 2022
CRC-Oriented Error Detection Architectures of Post-quantum Cryptography Niederreiter Key Generator on FPGA.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
Side-Channel Analysis and Countermeasure Design for Implementation of Curve448 on Cortex-M4.
Proceedings of the 11th International Workshop on Hardware and Architectural Support for Security and Privacy, 2022
Proceedings of the Topics in Cryptology - CT-RSA 2022, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., 2021
Reliable CRC-Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Error Detection Architectures for Ring Polynomial Multiplication and Modular Reduction of Ring-LWE in $\boldsymbol{\frac{\mathbb{Z}/p\mathbb{Z}[x]}{x^{n}+1}}$ Benchmarked on ASIC.
IEEE Trans. Reliab., 2021
ACM Trans. Embed. Comput. Syst., 2021
Fault Detection Architectures for Inverted Binary Ring-LWE Construction Benchmarked on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Reliable Architectures for Composite-Field-Oriented Constructions of McEliece Post-Quantum Cryptography on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Computers, 2021
Int. J. Comput. Math. Comput. Syst. Theory, 2021
No Silver Bullet: Optimized Montgomery Multiplication on Various 64-bit ARM Platforms.
IACR Cryptol. ePrint Arch., 2021
IACR Cryptol. ePrint Arch., 2021
High-Speed NTT-based Polynomial Multiplication Accelerator for CRYSTALS-Kyber Post-Quantum Cryptography.
IACR Cryptol. ePrint Arch., 2021
Proceedings of the Security and Privacy in Communication Networks, 2021
A Monolithic Hardware Implementation of Kyber: Comparing Apples to Apples in PQC Candidates.
Proceedings of the Progress in Cryptology - LATINCRYPT 2021, 2021
High-Speed NTT-based Polynomial Multiplication Accelerator for Post-Quantum Cryptography.
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021
2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Computers, 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the Progress in Cryptology - INDOCRYPT 2020, 2020
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020
2019
Hardware Constructions for Error Detection of Number-Theoretic Transform Utilized in Secure Cryptographic Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Reliable Architecture-Oblivious Error Detection Schemes for Secure Cryptographic GCM Structures.
IEEE Trans. Reliab., 2019
IEEE Trans. Dependable Secur. Comput., 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
SIKE'd Up: Fast and Secure Hardware Architectures for Supersingular Isogeny Key Encapsulation.
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Further Optimizations of CSIDH: A Systematic Approach to Efficient Strategies, Permutations, and Bound Vectors.
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
Proceedings of the Information Security Practice and Experience, 2019
Optimized Algorithms and Architectures for Montgomery Multiplication for Post-quantum Cryptography.
Proceedings of the Cryptology and Network Security - 18th International Conference, 2019
2018
Efficient and Reliable Error Detection Architectures of Hash-Counter-Hash Tweakable Enciphering Schemes.
ACM Trans. Embed. Comput. Syst., 2018
Reliable Inversion in GF(2<sup>8</sup>) With Redundant Arithmetic for Secure Error Detection of Cryptographic Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Reliable and Fault Diagnosis Architectures for Hardware and Software-Efficient Block Cipher KLEIN Benchmarked on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
A High-Performance and Scalable Hardware Architecture for Isogeny-Based Cryptography.
IEEE Trans. Computers, 2018
Modeling Quantum-Safe Authenticated Key Establishment, and an Isogeny-Based Protocol.
IACR Cryptol. ePrint Arch., 2018
Lightweight Hardware Architectures for Efficient Secure Hash Functions ECHO and Fugue.
CoRR, 2018
Towards Lightweight Error Detection Schemes for Implementations of MixColumns in Lightweight Cryptography.
CoRR, 2018
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018
Lightweight Error Detection Architectures through Swapping the Shares for a Subset of S-boxes.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Design-for-Error-Detection in Implementations of Cryptographic Nonlinear Substitution Boxes Benchmarked on ASIC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the Topics in Cryptology - CT-RSA 2018, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
Comparative realization of error detection schemes for implementations of mixcolumns in lightweight cryptography.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
2017
FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over $GF(2^{m})$ and Their Applications in Trinomial Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Fault Detection Architectures for Post-Quantum Cryptographic Stateless Hash-Based Secure Signatures Benchmarked on ASIC.
ACM Trans. Embed. Comput. Syst., 2017
Lightweight Architectures for Reliable and Fault Detection Simon and Speck Cryptographic Algorithms on FPGA.
ACM Trans. Embed. Comput. Syst., 2017
IEEE Trans. Dependable Secur. Comput., 2017
IEEE Trans. Dependable Secur. Comput., 2017
Reliable Hardware Architectures of the CORDIC Algorithm With a Fixed Angle of Rotations.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
IACR Cryptol. ePrint Arch., 2017
Evidence-Based Trust Mechanism Using Clustering Algorithms for Distributed Storage Systems.
IACR Cryptol. ePrint Arch., 2017
Efficient Software Implementation of Laddering Algorithms Over Binary Elliptic Curves.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2017
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017
Proceedings of the Selected Areas in Cryptography - SAC 2017, 2017
Evidence-Based Trust Mechanism Using Clustering Algorithms for Distributed Storage Systems (Short Paper).
Proceedings of the 15th Annual Conference on Privacy, Security and Trust, 2017
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017
2016
Guest Editorial: Introduction to the Special Section on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures.
IEEE ACM Trans. Comput. Biol. Bioinform., 2016
Fast Hardware Architectures for Supersingular Isogeny Diffie-Hellman Key Exchange on FPGA.
IACR Cryptol. ePrint Arch., 2016
IACR Cryptol. ePrint Arch., 2016
FourQ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields.
IACR Cryptol. ePrint Arch., 2016
NEON-SIDH: Effi cient Implementation of Supersingular Isogeny Diffi e-Hellman Key-Exchange Protocol on ARM.
IACR Cryptol. ePrint Arch., 2016
Proceedings of the Radio Frequency Identification and IoT Security, 2016
Efficient error detection architectures for CORDIC through recomputing with encoded operands.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Lightweight hardware architectures for fault diagnosis schemes of efficiently-maskable cryptographic substitution boxes.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Error detection reliable architectures of Camellia block cipher applicable to different variants of its substitution boxes.
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016
Efficient Algorithms and Architectures for Double Point Multiplication on Elliptic Curves.
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016
Four ℚ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016
NEON-SIDH: Efficient Implementation of Supersingular Isogeny Diffie-Hellman Key Exchange Protocol on ARM.
Proceedings of the Cryptology and Network Security - 15th International Conference, 2016
2015
Reliable and Error Detection Architectures of Pomaranch for False-Alarm-Sensitive Cryptographic Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Parallel and High-Speed Computations of Elliptic Curve Cryptography Using Hybrid-Double Multipliers.
IEEE Trans. Parallel Distributed Syst., 2015
Common Subexpression Algorithms for Space-Complexity Reduction of Gaussian Normal Basis Multiplication.
IEEE Trans. Inf. Theory, 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Secure and Efficient Architectures for Single Exponentiations in Finite Fields Suitable for High-Performance Cryptographic Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
High-Performance Two-Dimensional Finite Field Multiplication and Exponentiation for Cryptographic Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
IEEE Trans. Computers, 2015
IACR Cryptol. ePrint Arch., 2015
Proceedings of the Progress in Cryptology - INDOCRYPT 2015, 2015
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015
2014
Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., 2014
Dual-Basis Superserial Multipliers for Secure Applications and Lightweight Cryptographic Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Low-Latency Digit-Serial Systolic Double Basis Multiplier over $\mbi GF{(2^m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach.
IEEE Trans. Computers, 2014
A New Double Point Multiplication Algorithm and Its Application to Binary Elliptic Curves with Endomorphisms.
IEEE Trans. Computers, 2014
Fast Inversion in ${\schmi{GF(2^m)}}$ with Normal Basis Using Hybrid-Double Multipliers.
IEEE Trans. Computers, 2014
IEEE Embed. Syst. Lett., 2014
2013
Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA.
IEEE Trans. Ind. Electron., 2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases.
IEEE Trans. Computers, 2013
A Comparison of Double Point Multiplication Algorithms and their Implementation over Binary Elliptic Curves.
IACR Cryptol. ePrint Arch., 2013
2012
Efficient FPGA Implementations of Point Multiplication on Binary Edwards and Generalized Hessian Curves Using Gaussian Normal Basis.
IEEE Trans. Very Large Scale Integr. Syst., 2012
IACR Cryptol. ePrint Arch., 2012
2011
Secure Clustering and Symmetric Key Establishment in Heterogeneous Wireless Sensor Networks.
EURASIP J. Wirel. Commun. Netw., 2011
2010
Proceedings of the Arithmetic of Finite Fields, Third International Workshop, 2010
2008
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008