Renzo Andri
Orcid: 0000-0002-8776-5158
According to our database1,
Renzo Andri
authored at least 27 papers
between 2014 and 2024.
Collaborative distances:
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Bibliography
2024
Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor.
IEEE Trans. Computers, July, 2024
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024
2023
IEEE Trans. Computers, December, 2023
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication.
CoRR, 2023
Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor.
CoRR, 2023
MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tile.
CoRR, 2022
Identifying and Exploiting Sparse Branch Correlations for Optimizing Branch Prediction.
CoRR, 2022
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
PhD thesis, 2020
Sound event detection with binary neural networks on tightly power-constrained IoT devices.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018
2017
IEEE Trans. Hum. Mach. Syst., 2017
2016
Sustain. Comput. Informatics Syst., 2016
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
2015
Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch.
Proceedings of the Internet of Things. IoT Infrastructures, 2015
2014
SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014