Renzhi Liu

According to our database, Renzhi Liu authored at least 19 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Data-Driven Event-Triggered Control for Nonlinear Multi-Agent Systems With Uniform Quantization.

Hongru Ren, Renzhi Liu, Zhijian Cheng, Hui Ma, Hongyi Li

IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

A PVT Robust 8-Bit Signed Analog Compute-In-Memory Accelerator with Integrated Activation Functions for AI Applications.

Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Niranjan Gowda, Brent R. Carlton

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET.

Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton

IEEE J. Solid State Circuits, October, 2023

A 2-Gb/s UWB Transceiver for Short-Range Reconfigurable FDD Wireless Networks.

Renzhi Liu, K. T. Asma Beevi, Richard Dorrance, Timothy F. Cox, Rinkle Jain, Tolga Acikalin, Zhen Zhou, Tae-Young Yang, Johanny Escobar-Pelaez, Shuhei Yamada, Kenneth P. Foust, Brent R. Carlton

IEEE J. Solid State Circuits, May, 2023

An Improved Future Land-Use Simulation Model with Dynamically Nested Ecological Spatial Constraints.

Chaoxu Luan, Renzhi Liu, Jing Sun, Shangren Su, Zhenyao Shen

Remote. Sens., 2023

A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.

Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent R. Carlton

IEEE J. Solid State Circuits, 2023

2022

A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference.

Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen Liu, Dan Lake, Brent R. Carlton, May Wu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.

Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir Ahmed, Nachiket V. Desai, Nicolas Butzen, James W. Tschanz, Vivek De

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2020

An 802.11ba-Based Wake-Up Radio Receiver With Wi-Fi Transceiver Integration.

Renzhi Liu, K. T. Asma Beevi, Richard Dorrance, Deepak Dasalukunte, Vinod Kristem, Mario A. Santana Lopez, Alexander W. Min, Shahrnaz Azizi, Minyoung Park, Brent R. Carlton

IEEE J. Solid State Circuits, 2020

2019

An Ultra-Low Power, Fully Integrated Wake-Up Receiver and Digital Baseband with All-Digital Impairment Correction and -92.4dBm Sensitivity for 802.11ba.

Richard Dorrance, Renzhi Liu, K. T. Asma Beevi, Deepak Dasalukunte, Mario A. Santana Lopez, Vinod Kristem, Shahrnaz Azizi, Brent R. Carlton

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018

A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS.

Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav A. Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

Evaluating the benefits of relaxed BEOL pitch for deeply scaled ICs.

Mehmet Meric Isgenc, Samuel Pagliarini, Renzhi Liu, Larry T. Pileggi

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016

A wideband RF receiver with extended statistical element selection based harmonic rejection calibration.

Renzhi Liu, Lawrence T. Pileggi, Jeffrey A. Weldon

Integr., 2016

Digital Calibration Method for High Resolution in Analog/RF Designs.

Renzhi Liu

CoRR, 2016

Extended statistical element selection: a calibration method for high resolution in analog/RF designs.

Renzhi Liu, Jeffrey A. Weldon, Larry T. Pileggi

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC.

Renzhi Liu, Larry T. Pileggi

IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014

Efficient and secure intellectual property (IP) design with split fabrication.

Kaushik Vaidyanathan, Renzhi Liu, Huseyin Ekin Sumbul, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Building trusted ICs using split fabrication.

Kaushik Vaidyanathan, Bishnu Prasad Das, Huseyin Ekin Sumbul, Renzhi Liu, Larry T. Pileggi

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

A wideband RF receiver with >80 dB harmonic rejection ratio.

Renzhi Liu, Larry T. Pileggi, Jeffrey A. Weldon

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014