Rengarajan Ragavan

According to our database, Rengarajan Ragavan authored at least 6 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Error handling and energy estimation for error resilient near-threshold computing. (Gestion des erreurs et estimations énergétiques pour les architectures tolérantes aux fautes et proches du seuil).

Rengarajan Ragavan

PhD thesis, 2017

Taking advantage of correlation in stochastic computing.

Rahul Kumar Budhwani, Rengarajan Ragavan, Olivier Sentieys

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Pushing the limits of voltage over-scaling for error-resilient applications.

Rengarajan Ragavan, Benjamin Barrois, Cédric Killian, Olivier Sentieys

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Adaptive Overclocking and Error Correction Based on Dynamic Speculation Window.

Rengarajan Ragavan, Cédric Killian, Olivier Sentieys

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Low complexity on-chip distributed DC-DC converter for low power WSN nodes.

Rengarajan Ragavan, Cédric Killian, Olivier Sentieys

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

2013

A 0.35μm CMOS 6-bit current steering DAC.

Anand Narayanan, Mikael Bengtsson, Rengarajan Ragavan, Quoc-Tai Duong

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013