Ren-Der Chen
Orcid: 0000-0002-0493-9950
According to our database1,
Ren-Der Chen
authored at least 10 papers
between 1994 and 2021.
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Bibliography
2021
A High-Performance Bidirectional Architecture for the Quasi-Comparison-Free Sorting Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
2008
2003
IEEE Trans. Consumer Electron., 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
1999
An efficient method for the decomposition and resynthesis of speed-independent circuits.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1994
Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
A Super Fast & Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994