Remi Dekimpe
Orcid: 0000-0002-3611-0207
According to our database1,
Remi Dekimpe
authored at least 14 papers
between 2017 and 2024.
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Bibliography
2024
Cross-Domain Optimization of Low-Power Mixed-Signal Sensor Systems Under Classification Accuracy Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024
2023
Technical and Ecological Limits of 2.45-GHz Wireless Power Transfer for Battery-Less Sensors.
IEEE Internet Things J., September, 2023
2022
IEEE Trans. Biomed. Circuits Syst., 2022
Mixed-Signal Compensation of Tripolar Cuff Electrode Imbalance in a Low-Noise ENG Analog Front-End.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
A Configurable ULP Instrumentation Amplifier With Pareto-Optimal Power-Noise Trade-Off Achieving 1.93 NEF in 65nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6-3.6-μW/DMIPS 40-80-MHz Active Mode and 131-nW/kB Fully Retentive Deep-Sleep Mode.
IEEE J. Solid State Circuits, 2021
SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2019
A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer.
Integr., 2019
A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 0.4V 0.5fJ/cycle TSPC Flip-Flop in 65nm LP CMOS with Retention Mode Controlled by Clock-Gating Cells.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
2017
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017