Rekha Govindaraj

Orcid: 0000-0002-8129-2695

According to our database1, Rekha Govindaraj authored at least 11 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Reference-less Slope Detection Technique in 65nm for Robust Sensing of 1T1R Arrays.
CoRR, 2023

2020
Design, Analysis and Application of Embedded Resistive RAM Based Strong Arbiter PUF.
IEEE Trans. Dependable Secur. Comput., 2020

2018
Emerging Non-Volatile Memory Technologies for Computing and Security.
PhD thesis, 2018

CSRO-Based Reconfigurable True Random Number Generator Using RRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
Design and Analysis of STTRAM-Based Ternary Content Addressable Memory Cell.
ACM J. Emerg. Technol. Comput. Syst., 2017

2016
Overview of Circuits, Systems, and Applications of Spintronics.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

A strong arbiter PUF using resistive RAM.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

A strong arbiter PUF using resistive RAM within 1T-1R memory architecture.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015
Spintronics for associative computation and hardware security.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Design and analysis of 6-T 2-MTJ ternary Content Addressable Memory.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2012
An Efficient Technique for Longest Prefix Matching in Network Routers.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012


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