Reid Wistort

According to our database, Reid Wistort authored at least 4 papers between 2006 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise Mitigation.

Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort

IEEE J. Solid State Circuits, 2013

2012

1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing.

Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort

Proceedings of the Symposium on VLSI Circuits, 2012

2006

Improved Match-Line Test and Repair Methodology Including Power-Supply Noise Testing for Content-Addressable Memories.

Rahul Nadkarni, Igor Arsovski, Reid Wistort, Valerie Chickanosky

Proceedings of the 2006 IEEE International Test Conference, 2006

Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories.

Igor Arsovski, Reid Wistort

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006