Regis Zanandrea

According to our database, Regis Zanandrea authored at least 4 papers between 2016 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Post-processing of supergate networks aiming cell layout optimization.

Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa Jr.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A post-processing methodology to improve the automatic design of CMOS gates at layout-level.

Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa Jr.

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2016

Physical design of supergate cells aiming geometrical optimizations.

Maicon Schneider Cardoso, Gustavo H. Smaniotto, Regis Zanandrea, Renato Souza de Souza, Leomar S. da Rosa, Felipe de Souza Marques

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Topological characteristics of logic networks generated by a graph-based methodology.

Maicon Schneider Cardoso, Regis Zanandrea, Renato Souza de Souza, Joao Junior da Silva Machado, Leomar Soares da Rosa Jr., Felipe de Souza Marques

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016