Reed Lee
According to our database1,
Reed Lee
authored at least 2 papers
between 2014 and 2015.
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Bibliography
2015
A 28nm 36kb high speed 6T SRAM with source follower PMOS read and bit-line under-drive.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A low-power charge sharing hierarchical bitline and voltage-latched sense amplifier for SRAM macro in 28 nm CMOS technology.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014