Reddy Puppala Sreekanth

According to our database1, Reddy Puppala Sreekanth authored at least 3 papers in 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2007
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Novel, High-Speed 16-Digit BCD Adders Conforming to IEEE 754r Format.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Novel High-Speed Redundant Binary to Binary converter using Prefix Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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