Ravi T. Kollipara

According to our database1, Ravi T. Kollipara authored at least 6 papers between 2003 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits, 2014

2013
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2011
A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques.
IEEE J. Solid State Circuits, 2011

2008
A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter.
IEEE J. Solid State Circuits, 2008

2005
Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery.
IEEE J. Solid State Circuits, 2005

2003
Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell.
IEEE J. Solid State Circuits, 2003


  Loading...