Ravi Sankar Prasad

According to our database, Ravi Sankar Prasad authored at least 3 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.

Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2005

A 160MSPS 8-Bit Pipeline Based ADC.

Samiran Halder, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Swapna Banerjee

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm² Segmented Current Steering CMOS DAC.

Samiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005