Ravi Rajwar

According to our database, Ravi Rajwar authored at least 30 papers between 2000 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2023

Towards an Adaptable Systems Architecture for Memory Tiering at Warehouse-Scale.

Padmapriya Duraisamy, Wei Xu, Scott Hare, Ravi Rajwar, David E. Culler, Zhiyi Xu, Jianing Fan, Christopher Kennelly, Bill McCloskey, Danijela Mijailovic, Brian Morris, Chiranjit Mukherjee, Jingliang Ren, Greg Thelen, Paul Turner, Carlos Villavieja, Parthasarathy Ranganathan, Amin Vahdat

Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2015

Haswell: A Family of IA 22 nm Processors.

Nasser A. Kurd, Muntaquim Chowdhury, Edward Burton, Thomas P. Thomas, Christopher Mozak, Brent Boswell, Praveen Mosalikanti, Mark Neidengard, Anant Deval, Ashish Khanna, Nasirul Chowdhury, Ravi Rajwar, Timothy M. Wilson, Rajesh Kumar

IEEE J. Solid State Circuits, 2015

Specialized Evolution of the General Purpose CPU.

Ravi Rajwar, Martin G. Dixon, Ronak Singhal

Proceedings of the Seventh Biennial Conference on Innovative Data Systems Research, 2015

2014

Haswell: The Fourth-Generation Intel Core Processor.

Per Hammarlund, Alberto J. Martinez, Atiq A. Bajwa, David L. Hill, Erik G. Hallnor, Hong Jiang, Martin G. Dixon, Michael Derr, Mikal Hunsaker, Rajesh Kumar, Randy B. Osborne, Ravi Rajwar, Ronak Singhal, Reynold D'Sa, Robert Chappell, Shiv Kaushik, Srinivas Chennupaty, Stéphan Jourdan, Steve Gunther, Thomas Piazza, Ted Burton

IEEE Micro, 2014

Improving in-memory database index performance with Intel^® Transactional Synchronization Extensions.

Tomas Karnagel, Roman Dementiev, Ravi Rajwar, Konrad Lai, Thomas Legler, Benjamin Schlegel, Wolfgang Lehner

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013

Performance evaluation of Intel® transactional synchronization extensions for high-performance computing.

Richard M. Yoo, Christopher J. Hughes, Konrad Lai, Ravi Rajwar

Proceedings of the International Conference for High Performance Computing, 2013

2012

In search of parallel dimensions.

Ravi Rajwar

Proceedings of the 24th ACM Symposium on Parallelism in Algorithms and Architectures, 2012

2010

Transactional Memory, 2nd Edition

Tim Harris, James R. Larus, Ravi Rajwar

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01728-5, 2010

2008

Hardware Atomicity: An Effective Abstraction for Reliable Software Speculation.

Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, Craig B. Zilles

IEEE Micro, 2008

2007

Transactional memory and the birthday paradox.

Craig B. Zilles, Ravi Rajwar

Proceedings of the SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2007

Hardware atomicity for reliable software speculation.

Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, Craig B. Zilles

Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

Implications of False Conflict Rate Trends for Robust Software Transactional Memory.

Craig B. Zilles, Ravi Rajwar

Proceedings of the IEEE 10th International Symposium on Workload Characterization, 2007

2006

Transactional Memory

James R. Larus, Ravi Rajwar

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01719-3, 2006

Scalable Load and Store Processing in Latency-Tolerant Processors.

Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan, Konrad Lai

IEEE Micro, 2006

2005

The atomic manifesto: a story in four quarks.

Cliff B. Jones, David B. Lomet, Alexander B. Romanovsky, Gerhard Weikum, Alan D. Fekete, Marie-Claude Gaudel, Henry F. Korth, Rogério de Lemos, J. Eliot B. Moss, Ravi Rajwar, Krithi Ramamritham, Brian Randell, Luís E. T. Rodrigues

SIGMOD Rec., 2005

Atomicity as a First-Class System Provision.

J. Eliot B. Moss, Ravi Rajwar

J. Univers. Comput. Sci., 2005

Virtualizing Transactional Memory.

Ravi Rajwar, Maurice Herlihy, Konrad K. Lai

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

The Impact of Performance Asymmetry in Emerging Multicore Architectures.

Saisanthosh Balakrishnan, Ravi Rajwar, Michael Upton, Konrad K. Lai

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

2004

An analysis of a resource efficient checkpoint architecture.

Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan

ACM Trans. Archit. Code Optim., 2004

Continual Flow Pipelines: Achieving Resource-Efficient Latency Tolerance.

Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, Michael Upton

IEEE Micro, 2004

Inferential Queueing and Speculative Push.

Ravi Rajwar, Alain Kägi, James R. Goodman

Int. J. Parallel Program., 2004

Continual flow pipelines.

Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, Michael Upton

Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003

Transactional Execution: Toward Reliable, High-Performance Multithreading.

Ravi Rajwar, James R. Goodman

IEEE Micro, 2003

Checkpoint Processing and Recovery: An Efficient, Scalable Alternative to Reorder Buffers.

Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan

IEEE Micro, 2003

Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors.

Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan

Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Inferential queueing and speculative push for reducing critical communication latencies.

Ravi Rajwar, Alain Kägi, James R. Goodman

Proceedings of the 17th Annual International Conference on Supercomputing, 2003

2002

Transactional lock-free execution of lock-based programs.

Ravi Rajwar, James R. Goodman

Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001

Speculative lock elision: enabling highly concurrent multithreaded execution.

Ravi Rajwar, James R. Goodman

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

An Architectural Evaluation of Java TPC-W.

Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko H. Lipasti

Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

2000

Improving the Throughput of Synchronization by Insertion of Delays.

Ravi Rajwar, Alain Kägi, James R. Goodman

Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000