Ravi Namballa

According to our database, Ravi Namballa authored at least 6 papers between 2004 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

CHESS: A Comprehensive Tool for CDFG Extraction and Synthesis of Low Power Designs from VHDL.

Nagarajan Ranganathan, Ravi Namballa, Narender Hanchate

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

2005

A VLSI architecture for visible watermarking in a secure still digital camera (S²/DC) design (Corrected)*.

Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa

IEEE Trans. Very Large Scale Integr. Syst., 2005

A VLSI architecture for watermarking in a secure still digital camera (S²DC) design.

Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa

IEEE Trans. Very Large Scale Integr. Syst., 2005

An object-oriented simulation framework for real-time control of automated flexible manufacturing systems.

Ali Yalcin, Ravi Namballa

Comput. Ind. Eng., 2005

2004

VLSI Implementation of Visible Watermarking for a Secure Digital Still Camera Design.

Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Control and Data Flow Graph Extraction for High-Level Synthesis.

Ravi Namballa, Nagarajan Ranganathan, Abdel Ejnioui

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004