Raúl Mateos

According to our database, Raúl Mateos authored at least 22 papers between 2001 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

HW/SW Architecture for a Broadband Power-Line Communication System With LS Channel Estimator and ASCET Equalizer.

Rubén Nieto, Raúl Mateos, Álvaro Hernández

IEEE Trans. Ind. Informatics, 2020

Performance Improvement of PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer Based on a Multi-Core Solution.

Rubén Nieto, Raúl Mateos, Álvaro Hernández

IEEE Access, 2020

Evaluation of Software Inter-Processor Synchronization Methods for the Zynq-UltraScale+ Architecture.

Rubén Nieto, Edel Díaz, Raúl Mateos, Álvaro Hernández

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

Distortion-Free Instantaneous Multifrequency Saturator for THD Current Reduction.

Javier Moriano, Mario Rizo, Emilio Bueno, J. Rafael Sendra, Raúl Mateos

IEEE Trans. Ind. Electron., 2019

Real-time architecture for channel estimation and equalization in broadband PLC.

Francisco Nombela, Enrique García, Raúl Mateos, Álvaro Hernández

Microprocess. Microsystems, 2019

Virtual Platform of FPGA based SoC for Power Electronics Applications.

Edel Díaz, Raúl Mateos, Emilio José Bueno

Proceedings of the 28th IEEE International Symposium on Industrial Electronics, 2019

Virtual Platform of FPGA based MPSoC for Power Electronics Applications: OS simulation.

Edel Díaz, Raúl Mateos, Emilio José Bueno

Proceedings of the IECON 2019, 2019

Dual-Core Architecture for PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer.

Rubén Nieto, Raúl Mateos, Álvaro Hernández, Edel Díaz

Proceedings of the 24th IEEE International Conference on Emerging Technologies and Factory Automation, 2019

2018

FPGA-Based Architecture for Medium Access Techniques in Broadband PLC.

Pablo Poudereux, Álvaro Hernández, Fernando Cruz-Roldán, Raúl Mateos

IEEE Access, 2018

Finite Precision Analysis of FPGA-based Architecture for FBMC Transmultiplexers in Broadband PLC.

Rubén Nieto, Raúl Mateos, Álvaro Hernández

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2016

Design of a filter bank multi-carrier system for broadband power line communications.

Pablo Poudereux, Álvaro Hernández, Raúl Mateos, Freddy A. Pinto-Benel, Fernando Cruz-Roldán

Signal Process., 2016

2015

Efficient Implementation of a Symbol Timing Estimator for Broadband PLC.

Francisco Nombela, Enrique García, Raúl Mateos, Álvaro Hernández

Sensors, 2015

Study of suitable filter architectures for FBMC techniques applied to PLC communications.

Pablo Poudereux, Raúl Mateos, Álvaro Hernández, Francisco Nombela, Fernando Cruz-Roldán

Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015

2014

FPGA-based implementation of a filter bank-based transmultiplexer for multicarrier communications.

Pablo Poudereux, Raúl Mateos, Álvaro Hernández, Fernando Cruz-Roldán, David Oses

Proceedings of the 2014 IEEE Emerging Technology and Factory Automation, 2014

2013

Comparative of HLS and HDL implementations of a grid synchronization algorithm.

Fco. Manuel Sánchez, Raúl Mateos, Emilio José Bueno, Javier Mingo, Ines Sanz

Proceedings of the IECON 2013, 2013

2010

A Strict-Time Distributed Architecture for Digital Beamforming of Ultrasound Signals.

Jorge Camacho, Oscar Martinez, Montserrat Parrilla, Raúl Mateos, Carlos Fritsch

IEEE Trans. Instrum. Meas., 2010

2009

A DSP- and FPGA-Based Industrial Control With High-Speed Communication Interfaces for Grid Converters Applied to Distributed Power Generation Systems.

Emilio José Bueno, Álvaro Hernández, Francisco J. Rodríguez, Carlos Giron, Raúl Mateos, Santiago Cóbreces

IEEE Trans. Ind. Electron., 2009

2004

Hardware/software co-simulation environment for CSoC with soft processors.

Raúl Mateos, José Luis Lázaro, Felipe Espinosa

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003

Lossless implementation in VHDL of an image wavelet transform.

Raúl Mateos, Alfredo Gardel Vicente, Álvaro Hernández, Ignacio Bravo Muñoz, C. Garcia

Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003

Different proposals to the multiplication of 3×3 vision mask in VHDL for FPGA's.

Ignacio Bravo Muñoz, Álvaro Hernández, Alfredo Gardel Vicente, Raúl Mateos, José Luis Lázaro, V. Diaz

Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003

2001

Mobile Robot with Wide Capture Active Laser Sensor and Environment Definition.

José Luis Lázaro, Alfredo Gardel Vicente, Manuel Mazo, C. Mataix, Juan C. García, Raúl Mateos

J. Intell. Robotic Syst., 2001

Advanced and Intelligent Control Techniques Applied to the Drive Control and Path Tracking Systems on a Robotic Wheelchair.

Felipe Espinosa, Elena López Guillén, Raúl Mateos, Manuel Mazo, Ricardo García

Auton. Robots, 2001