Ratul Kumar Baruah

According to our database, Ratul Kumar Baruah authored at least 3 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

Design of 3 bit/cell NAND Memory Array Based on Ferroelectric Field Effect Transistor.

Albert Daimari, Ankit Chakusaru Deori, Amab Ratna Pawe, Ratul Kumar Baruah

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2013

A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance.

Ratul Kumar Baruah, Roy P. Paily

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013

2009

Concept of "Crossover Point" and its Application on Threshold Voltage Definition for Undoped-Body Transistors.

Ratul Kumar Baruah, Santanu Mahapatra

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009