Raphael Rubin

According to our database1, Raphael Rubin authored at least 16 papers between 2003 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
Reducing FPGA Compile Time with Separate Compilation for FPGA Building Blocks.
Proceedings of the International Conference on Field-Programmable Technology, 2019

2018
Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP).
ACM Trans. Reconfigurable Technol. Syst., 2018

2017
Self-Adaptive Timing Repair.
IEEE Des. Test, 2017

Quality-Time Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
Pitfalls and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015
Architectural Support for Software-Defined Metadata Processing.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
PUMP: a programmable unit for metadata processing.
Proceedings of the HASP 2014, 2014

2012
Limit study of energy & delay benefits of component-specific routing.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
Choose-your-own-adventure routing: Lightweight load-time defect avoidance.
ACM Trans. Reconfigurable Technol. Syst., 2011

Timing-driven pathfinder pathology and remediation: quantifying and reducing delay noise in VPR-pathfinder.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

Component-Specific Mapping for Low-Power Operation in the Presence of Variation and Aging.
Proceedings of the Low-Power Variation-Tolerant Design in Nanometer Silicon, 2011

2006
3D Nanowire-Based Programmable Logic.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Packet Switched vs. Time Multiplexed FPGA Overlay Networks.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

GraphStep: A System Architecture for Sparse-Graph Algorithms.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2004
Design of FPGA interconnect for multilevel metallization.
IEEE Trans. Very Large Scale Integr. Syst., 2004

2003
Design of FPGA interconnect for multilevel metalization.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003


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