Raphael Polig

According to our database, Raphael Polig authored at least 22 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach.

Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2021

Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs.

Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, François Abel

Proceedings of the 14th IEEE International Conference on Cloud Computing, 2021

2020

FPGA Accelerated Analysis of Boolean Gene Regulatory Networks.

Matteo Manica, Raphael Polig, Mitra Purandare, Roland Mathis, Christoph Hagleitner, María Rodríguez Martínez

IEEE ACM Trans. Comput. Biol. Bioinform., 2020

2018

A hardware compilation framework for text analytics queries.

Raphael Polig, Kubilay Atasu, Heiner Giefers, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee

J. Parallel Distributed Comput., 2018

2017

Accelerated analysis of Boolean gene regulatory networks.

Mitra Purandare, Raphael Polig, Christoph Hagleitner

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Formal Techniques for Effective Co-verification of Hardware/Software Co-designs.

Rajdeep Mukherjee, Mitra Purandare, Raphael Polig, Daniel Kroening

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

J. Signal Process. Syst., 2016

A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware.

Christoph M. Angerer, Raphael Polig, D. Zegarac, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni

Sustain. Comput. Informatics Syst., 2016

Network-attached FPGAs for data center applications.

Jagath Weerasinghe, Raphael Polig, François Abel, Christoph Hagleitner

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Annotation-based finite-state transducers on reconfigurable devices.

Raphael Polig, Kubilay Atasu, Christoph Hagleitner, Theresa Xu, Akihiro Nakayama

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Energy-efficient stochastic matrix function estimator for graph analytics on FPGA.

Heiner Giefers, Peter W. J. Staar, Raphael Polig

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015

Text Analytics on Reconfigurable Platforms.

Raphael Polig

PhD thesis, 2015

Accelerating arithmetic kernels with coherent attached FPGA coprocessors.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A soft-core processor array for relational operators.

Raphael Polig, Heiner Giefers, Walter Stechele

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014

Giving Text Analytics a Boost.

Raphael Polig, Kubilay Atasu, Laura Chiticariu, Christoph Hagleitner, H. Peter Hofstee, Frederick R. Reiss, Huaiyu Zhu, Eva Sitaridi

IEEE Micro, 2014

Hardware-accelerated text analytics.

Raphael Polig, Kubilay Atasu, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee

Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

Compiling text analytics queries to FPGAs.

Raphael Polig, Kubilay Atasu, Heiner Giefers, Laura Chiticariu

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013

Exploring the design space of programmable regular expression matching accelerators.

Kubilay Atasu, Raphael Polig, Jonathan Rohrer, Christoph Hagleitner

J. Syst. Archit., 2013

Token-based dictionary pattern matching for text analytics.

Raphael Polig, Kubilay Atasu, Christoph Hagleitner

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Hardware-accelerated regular expression matching for high-throughput text analytics.

Kubilay Atasu, Raphael Polig, Christoph Hagleitner, Frederick R. Reiss

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A high-speed and large-scale dictionary matching engine for Information Extraction systems.

Kanak Agarwal, Raphael Polig

Proceedings of the 24th International Conference on Application-Specific Systems, 2013