Ranjani Parthasarathi
Orcid: 0000-0003-2643-3026
According to our database1,
Ranjani Parthasarathi
authored at least 52 papers
between 1989 and 2024.
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Bibliography
2024
Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators - Trends in Quantum Computing, Heterogeneous Systems and Reliability.
ACM Comput. Surv., November, 2024
Machine Learning based Waveform Predictions using Discrete Wavelet Transform for Automated Verification of Analog and Mixed Signal Integrated Circuits.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
Enhancement in Reliability for Multi-core system consisting of One Instruction Cores.
CoRR, 2023
Analysis of Machine Learning Techniques for Time Domain Waveform Prediction in Analog and Mixed Signal Integrated Circuit Verification.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
2022
A Formalism to Specify Unambiguous Instructions Inspired by Mīmāṁsā in Computational Settings.
Logica Universalis, 2022
A Survey of fault models and fault tolerance methods for 2D bus-based multi-core systems and TSV based 3D NOC many-core systems.
CoRR, 2022
2021
Performance counter based online pipeline bugs detection using machine learning techniques.
Microprocess. Microsystems, 2021
2020
Concurr. Comput. Pract. Exp., 2020
2019
Bootstrapping of Semantic Relation Extraction for a Morphologically Rich Language: Semi-Supervised Learning of Semantic Relations.
Int. J. Semantic Web Inf. Syst., 2019
Controller Monitoring System In Software Defined Networks Using Random Forest Algorithm.
Proceedings of the 2019 International Carnahan Conference on Security Technology, 2019
2017
Int. J. Inf. Retr. Res., 2017
ACM Comput. Surv., 2017
Concurr. Comput. Pract. Exp., 2017
Artif. Intell. Rev., 2017
2016
Int. J. Semantic Web Inf. Syst., 2016
Int. J. Inf. Commun. Technol., 2016
2015
Building a Language-Independent Discourse Parser using Universal Networking Language.
Comput. Intell., 2015
Proceedings of the Mining Intelligence and Knowledge Exploration, 2015
2014
Int. J. Intell. Inf. Technol., 2014
Proceedings of the Mining Intelligence and Knowledge Exploration, 2014
2013
J. Appl. Log., 2013
2012
Proceedings of the 2012 International Conference on Advances in Computing, 2012
Proceedings of the COLING 2012, 2012
2011
Int. J. Netw. Virtual Organisations, 2011
A Multilevel UNL Concept based Searching and Ranking.
Proceedings of the WEBIST 2011, 2011
A Language Independent Rhetorical Structure Framework Using Universal Networking Language.
Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011
Mimamsa Inspired Representation of Actions (MIRA).
Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011
Anaphora Resolution in Tamil using Universal Networking Language.
Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011
2009
2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2007
Proceedings of the Third IEEE International Conference on Wireless and Mobile Computing, 2007
Proceedings of the Third International Conference on Networking and Services (ICNS 2007), 2007
Proceedings of the Advances in Grid and Pervasive Computing, 2007
Proceedings of the Second International Conference on COMmunication System softWAre and MiddlewaRE (COMSWARE 2007), 2007
2005
Appl. Soft Comput., 2005
Proceedings of the Active and Programmable Networks, 2005
Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005
2004
Proceedings of the High Performance Computing, 2004
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
2003
JBits Based Fault Tolerant Framework for Evolvable Hardware.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003
Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem.
Proceedings of the Advances in Computer Systems Architecture, 2003
2002
Dead-Block Elimination in Cache: A Mechanism to Reduce I-cache Power Consumption in High Performance Microprocessors.
Proceedings of the High Performance Computing, 2002
2001
A Reconfigurable Co-Processor for Variable Long Precision Arithmetic Using Indian Algorithms.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001
1997
J. Syst. Archit., 1997
1995
Modified straight division: A computer implementation of multiple-precision division.
Microprocess. Microprogramming, 1995
1989