Ramya Muralidharan
According to our database1,
Ramya Muralidharan
authored at least 8 papers
between 2008 and 2013.
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Bibliography
2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2012
Area-Power Efficient Modulo 2<sup>n</sup>-1 and Modulo 2<sup>n</sup>+1 Multipliers for {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1} Based RNS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
2011
Radix-8 Booth Encoded Modulo 2 <sup>n</sup> -1 Multipliers With Adaptive Delay for High Dynamic Range Residue Number System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Fast hard multiple generators for radix-8 Booth encoded modulo 2<sup>n</sup>-1 and modulo 2<sup>n</sup>+1 multipliers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Fixed and Variable Multi-modulus Squarer Architectures for Triple Moduli base of RNS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Programmable LSB-first and MSB-first modular multipliers for ECC in GF(2<sup>m</sup>).
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008