Ramkrishna Swamy

According to our database1, Ramkrishna Swamy authored at least 6 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder.
IEEE J. Solid State Circuits, 2007

2006
Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Parallel encoders for low-density parity-check convolutional codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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