Ramin Zanbaghi
According to our database1,
Ramin Zanbaghi
authored at least 13 papers
between 2006 and 2020.
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Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2020
A Highly Linear OTA-Less 1-1 MASH VCO-Based ΔΣ ADC With an Efficient Phase Quantization Noise Extraction Technique.
IEEE J. Solid State Circuits, 2020
2019
A 72.4-dB SNDR 92-dB SFDR Blocker Tolerant CT $\Delta\Sigma$ Modulator With Inherent DWA.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
0.9V, 79.7dB SNDR, 2MHz-BW, Highly linear OTA-less 1-1 MASH VCO-based ΔΣ with a Novel Phase Quantization Noise Extraction Technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2013
An 80-dB DR, 7.2-MHz Bandwidth Single Opamp Biquad Based CT ΔΣ Modulator Dissipating 13.7-mW.
IEEE J. Solid State Circuits, 2013
2012
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
2011
A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006