Ramesh Narayanaswamy

According to our database, Ramesh Narayanaswamy authored at least 4 papers between 1983 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines.

Jitendra Bhandari, Johann Knechtel, Ramesh Narayanaswamy, Siddharth Garg, Ramesh Karri

CoRR, 2024

2001

Panel: Your Core - My Problem? Integration and Verification of IP.

Gabe Moretti, Tim Hopes, Ramesh Narayanaswamy, Nanette Collins, Dave Kelf, Tom Anderson, Janick Bergeron, Ashish Dixit, Peter Flake

Proceedings of the 38th Design Automation Conference, 2001

1984

Modeling and Testing for Timing Faults in Synchronous Sequential Circuits.

Yashwant K. Malaiya, Ramesh Narayanaswamy

IEEE Des. Test, 1984

1983

Testing for Timing Faults in Synchronous Sequential Integrated Circuits.

Yashwant K. Malaiya, Ramesh Narayanaswamy

Proceedings of the Proceedings International Test Conference 1983, 1983