Ramen Dutta

According to our database, Ramen Dutta authored at least 7 papers between 2009 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO.

Ramen Dutta, Ronan A. R. van der Zee, André B. J. Kokkeler, Mark J. Bentum, Eric A. M. Klumperink, Bram Nauta

IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

2013

Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic.

Ramen Dutta, Eric A. M. Klumperink, Xiang Gao, Zhiyu Ru, Ronan A. R. van der Zee, Bram Nauta

IEEE Trans. Circuits Syst. II Express Briefs, 2013

2011

Performance of chirped-FSK and chirped-PSK in the presence of partial-band interference.

Ramen Dutta, André B. J. Kokkeler, Ronan A. R. van der Zee, Mark J. Bentum

Proceedings of the 18th IEEE Symposium on Communications and Vehicular Technology in the Benelux, 2011

Jitter-Power minimization of digital frequency synthesis architectures.

Eric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta, Xiang Gao

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Choosing Optimum Noise Figure and Data Rate in Wireless Sensor Network Radio Transceivers.

Ramen Dutta, Ronan A. R. van der Zee, Mark J. Bentum, André B. J. Kokkeler

Proceedings of IEEE International Conference on Communications, 2011

2010

Optimized Stage Ratio of Tapered CMOS Inverters for Minimum Power and Mismatch Jitter Product.

Ramen Dutta, Tarun Kanti Bhattacharyya, Xiang Gao, Eric A. M. Klumperink

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

2009

A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock.

Ramen Dutta, T. K. Bhattacharyya

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009