Rambabu Pyapali
According to our database1,
Rambabu Pyapali
authored at least 2 papers
between 2008 and 2009.
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Bibliography
2009
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
IEEE J. Solid State Circuits, 2009
2008
Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008