Ramachandran Vaidyanathan

According to our database, Ramachandran Vaidyanathan authored at least 85 papers between 1992 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

31st Reconfigurable Architectures Workshop (RAW 2024).

Jürgen Becker, Zhenman Fang, Viktor K. Prasanna, Marco D. Santambrogio, Ramachandran Vaidyanathan

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

2023

NSF/IEEE-TCPP Curriculum on Parallel and Distributed Computing for Undergraduates - Version II - Big Data, Energy, and Distributed Computing.

Sushil K. Prasad, Charles C. Weems, Alan Sussman, Anshul Gupta, Trilce Estrada, Ramachandran Vaidyanathan, Sheikh K. Ghafoor, Krishna Kant, Craig B. Stunkel

Proceedings of the 54th ACM Technical Symposium on Computer Science Education, Volume 2, 2023

Integrating Parallel and Distributed Computing in Early Computing Classes.

Sheikh K. Ghafoor, Charles C. Weems, Alan Sussman, Ramachandran Vaidyanathan, Sushil K. Prasad

Proceedings of the 54th ACM Technical Symposium on Computer Science Education, Volume 2, 2023

On Doorway Egress by Autonomous Robots.

Rory Hector, Ramachandran Vaidyanathan, Gokarna Sharma, Jerry L. Trahan

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2022

Optimal Convex Hull Formation on a Grid by Asynchronous Robots With Lights.

Rory Hector, Ramachandran Vaidyanathan, Gokarna Sharma, Jerry L. Trahan

IEEE Trans. Parallel Distributed Syst., 2022

On fast pattern formation by autonomous robots.

Ramachandran Vaidyanathan, Gokarna Sharma, Jerry L. Trahan

Inf. Comput., 2022

Optimal Arbitrary Pattern Formation on a Grid by Asynchronous Autonomous Robots.

Rory Hector, Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

29th Reconfigurable Architectures Workshop (RAW 2022).

Jürgen Becker, Lana Josipovic, Viktor K. Prasanna, Marco D. Santambrogio, Ramachandran Vaidyanathan

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

2021

Optimal Randomized Complete Visibility on a Grid for Asynchronous Robots with Lights.

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan

Int. J. Netw. Comput., 2021

Constant-Time Complete Visibility for Robots with Lights: The Asynchronous Case.

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan

Algorithms, 2021

On Optimal Doorway Egress by Autonomous Robots.

Rory Hector, Ramachandran Vaidyanathan, Gokarna Sharma, Jerry L. Trahan

Proceedings of the Stabilization, Safety, and Security of Distributed Systems, 2021

2020

Efficient, Effective and Well Justified Estimation of Active Nodes within a Cluster.

Md Mahmudul Hasan, Shuangqing Wei, Ramachandran Vaidyanathan

CoRR, 2020

2019

RAW 2016.

Marco D. Santambrogio, Ramachandran Vaidyanathan

J. Parallel Distributed Comput., 2019

2018

VSI: Edu*-2016 - Keeping up with technology: Teaching parallel, distributed and high-performance computing.

Sushil K. Prasad, Sheikh K. Ghafoor, Christos Kaklamanis, Ramachandran Vaidyanathan

J. Parallel Distributed Comput., 2018

Estimation of RFID Tag Population Size by Gaussian Estimator.

Md Mahmudul Hasan, Shuangqing Wei, Ramachandran Vaidyanathan

Proceedings of the 2018 IEEE International Conference on Communications, 2018

2017

Constant-Time Complete Visibility for Asynchronous Robots with Lights.

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan

Proceedings of the Stabilization, Safety, and Security of Distributed Systems, 2017

Brief Announcement: Asynchronous, Distributed, Optical Mutual Exclusion.

Ahmed B. Mansour, Ramachandran Vaidyanathan, Shuangqing Wei

Proceedings of the Stabilization, Safety, and Security of Distributed Systems, 2017

O(log N)-Time Complete Visibility for Asynchronous Robots with Lights.

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan, Costas Busch, Suresh Rai

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Introduction to RAW Workshop.

Marco D. Santambrogio, Ramachandran Vaidyanathan

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Combining Boolean Gates and Branching Programs in One Model can Lead to Faster Circuits.

Yosi Ben-Asher, Esti Stein, Ramachandran Vaidyanathan

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Efficient Totally-Ordered Subset Generation, with Application in Partial Reconfiguration.

Utsav Agarwal, Ramachandran Vaidyanathan

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016

Guest Editorial RAW 2014.

Marco D. Santambrogio, Ramachandran Vaidyanathan

ACM Trans. Reconfigurable Technol. Syst., 2016

Complete Visibility for Robots with Lights in O(1) Time.

Gokarna Sharma, Ramachandran Vaidyanathan, Jerry L. Trahan, Costas Busch, Suresh Rai

Proceedings of the Stabilization, Safety, and Security of Distributed Systems, 2016

EduPar Introduction and Committees.

Ramachandran Vaidyanathan, Sushil K. Prasad, Satish Puri

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

RAW Introduction and Committees.

Marco D. Santambrogio, Ramachandran Vaidyanathan, Diana Goehringer, Steven J. E. Wilton

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015

Asymptotic Error Free Partitioning Over Noisy Boolean Multiaccess Channels.

Shuhang Wu, Shuangqing Wei, Yue Wang, Ramachandran Vaidyanathan, Jian Yuan

IEEE Trans. Inf. Theory, 2015

Partition Information and its Transmission Over Boolean Multi-Access Channels.

Shuhang Wu, Shuangqing Wei, Yue Wang, Ramachandran Vaidyanathan, Jian Yuan

IEEE Trans. Inf. Theory, 2015

Efficient transformations for Klee's measure problem in the streaming model.

Gokarna Sharma, Costas Busch, Ramachandran Vaidyanathan, Suresh Rai, Jerry L. Trahan

Comput. Geom., 2015

Detection of graph structures via communications over a multiaccess Boolean channel.

Shuhang Wu, Shuangqing Wei, Yue Wang, Ramachandran Vaidyanathan, Jian Yuan, Xiqin Wang

Proceedings of the IEEE International Symposium on Information Theory, 2015

Logarithmic-Time Complete Visibility for Robots with Lights.

Ramachandran Vaidyanathan, Costas Busch, Jerry L. Trahan, Gokarna Sharma, Suresh Rai

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

RAW Introduction and Committees.

Jürgen Becker, Ken Eguro, Diana Göhringer, Wayne Luk, Marco D. Santambrogio, Ramachandran Vaidyanathan, Steven J. E. Wilton

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

An Architecture for Configuring an Effcient Scan Path for a Subset of Elements.

Arash Ashrafi, Ramachandran Vaidyanathan

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

2014

Achievable partition information rate over noisy multi-access Boolean channel.

Shuhang Wu, Shuangqing Wei, Yue Wang, Ramachandran Vaidyanathan, Jian Yuan

Proceedings of the 2014 IEEE International Symposium on Information Theory, Honolulu, HI, USA, June 29, 2014

RAW Introduction and Committees.

Jürgen Becker, Ramachandran Vaidyanathan, Marco D. Santambrogio, Jim Tørresen, Ron Sass, Philip Heng Wai Leong

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Work-Efficient Load Balancing.

Gokarna Sharma, Suresh Rai, Costas Busch, Jerry L. Trahan, Ramachandran Vaidyanathan

Proceedings of the 43rd International Conference on Parallel Processing Workshops, 2014

Transmission of partitioning information over non-adaptive multi-access Boolean channel.

Shuhang Wu, Shuangqing Wei, Yue Wang, Ramachandran Vaidyanathan, Jian Yuan

Proceedings of the 48th Annual Conference on Information Sciences and Systems, 2014

2013

Pipelined Execution of Windowed Image Computations.

Ramachandran Vaidyanathan, Phaneendra Vinukonda, Alyssa C. Lessing

Int. J. Netw. Comput., 2013

RAW Introduction.

Jürgen Becker, Ramachandran Vaidyanathan, Peter Athanas, Marco D. Santambrogio, René Cumplido, Oliver Sander

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012

On Running Windowed Image Computations on a Pipeline.

Ramachandran Vaidyanathan, Phaneendra Vinukonda

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

An Efficient Transformation for the Klee's Measure Problem in the Streaming Model.

Gokarna Sharma, Costas Busch, Ramachandran Vaidyanathan, Suresh Rai, Jerry L. Trahan

Proceedings of the 24th Canadian Conference on Computational Geometry, 2012

2010

MU-decoders: A class of fast and efficient configurable decoders.

Matthew Collin Jordan, Ramachandran Vaidyanathan

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2008

Configurable decoders with application in fast partial reconfiguration of FPGAs.

Matthew Collin Jordan, Ramachandran Vaidyanathan

Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm.

Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan

Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2008

2007

Dynamic Reconfiguration on the R-Mesh.

Jerry L. Trahan, Ramachandran Vaidyanathan

Proceedings of the Handbook of Parallel Computing - Models, Algorithms and Applications., 2007

2006

Routing Multiple Width Communications on the Circuit Switched Tree.

Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan

Int. J. Found. Comput. Sci., 2006

Reconfigurable Implementation of Wavelet Integer Lifting Transforms for Image Compression.

Steven Bishop, Suresh Rai, Bahadir K. Gunturk, Jerry L. Trahan, Ramachandran Vaidyanathan

Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

2005

Configuring the Circuit Switched Tree for Multiple Width Communications.

Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

On Mapping Multidimensional Weak Tori on Optical Slab Waveguides.

Ramachandran Vaidyanathan, Karthik Sethuraman

Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005

2004

Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms.

Hettihe P. Dharmasena, Ramachandran Vaidyanathan

IEEE Trans. Computers, 2004

The Mesh With Binary Tree Networks: An Enhanced Mesh With Low Bus-Loading.

Hettihe P. Dharmasena, Ramachandran Vaidyanathan

J. Interconnect. Networks, 2004

2003

Degree of scalability: scalable reconfigurable mesh algorithms for multiple addition and matrix-vector multiplication.

Ramachandran Vaidyanathan, Jerry L. Trahan, Chun-ming Lu

Parallel Comput., 2003

On Designing Implementable Algorithms for the Linear Reconfigurable Mesh.

Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Fault Tolerance in Multiple Bus Networks with Unbalanced Resource Utilization.

Hettihe P. Dharmasena, Ramachandran Vaidyanathan

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Adaptive Image Filtering Using Run-Time Reconfiguration.

Nitin Srivastava, Jerry L. Trahan, Ramachandran Vaidyanathan, Suresh Rai

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Dynamic reconfiguration - architectures and algorithms.

Ramachandran Vaidyanathan, Jerry L. Trahan

Series in computer science, Springer, ISBN: 978-0-306-48189-5, 2003

2002

Using Bus Linearization to Scale the Reconfigurable Mesh.

José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan

J. Parallel Distributed Comput., 2002

Scaling multiple addition and prefix sums on the reconfigurable mesh.

Jerry L. Trahan, Ramachandran Vaidyanathan

Inf. Process. Lett., 2002

Reconfigurable Mesh on the Reconfigurable Tree Array.

Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Free Space All-optical Crossconnect.

Martin Feldman, Ahmed El-Amawy, Ramachandran Vaidyanathan

Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

On the Communication Capability of the Self-Reconfigurable Gate Array Architecture.

Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2000

Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses.

Jerry L. Trahan, Anu G. Bourgeois, Yi Pan, Ramachandran Vaidyanathan

J. Parallel Distributed Comput., 2000

1999

Improved Scaling Simulation of the General Reconfigurable Mesh.

José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan

Proceedings of the Parallel and Distributed Processing, 1999

High Speed, High Capacity Bused Interconnects using Optical Slab Waveguides.

Martin Feldman, Ramachandran Vaidyanathan, Ahmed El-Amawy

Proceedings of the Parallel and Distributed Processing, 1999

Lower Bounds on the Loading of Degree-2 Multiple Bus Networks for Binary-Tree Algorithms.

Hettihe P. Dharmasena, Ramachandran Vaidyanathan

Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

1998

Scaling Simulation of the Fusing-Restricted Reconfigurable Mesh.

José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan

IEEE Trans. Parallel Distributed Syst., 1998

Tighter and Broader Complexity Results for Reconfigurable Models.

Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan

Parallel Process. Lett., 1998

1997

Constant Time Graph Algorithms on the Reconfigurable Mutliple Buss Machine.

Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman

J. Parallel Distributed Comput., 1997

A Scalable and Efficient Algorithm for Computing the City Block Distance Transform on Reconfigurable Meshes.

Yi Pan, Jerry L. Trahan, Ramachandran Vaidyanathan

Comput. J., 1997

An Optimal Multiple Bus Network for Fan-in Algorithms.

Hettihe P. Dharmasena, Ramachandran Vaidyanathan

Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

1996

Exact Bounds on Running ASCEND/DESCEND and FAN-IN Algorithms on Synchronous Multiple Bus Networks.

Arshad Ali, Ramachandran Vaidyanathan

IEEE Trans. Parallel Distributed Syst., 1996

On the Power of Segmenting and Fusing Buses.

Jerry L. Trahan, Ramachandran Vaidyanathan, Ratnapuri K. Thiruchelvan

J. Parallel Distributed Comput., 1996

The Bus-Connected Ringed Tree: A Versatile Interconnection Network.

Omkar M. Dighe, Ramachandran Vaidyanathan, Si-Qing Zheng

J. Parallel Distributed Comput., 1996

Fault-Tolerant Multiple Bus Networks for Fan-In Algorithms.

Ramachandran Vaidyanathan, Sudharani Nadella

Proceedings of IPPS '96, 1996

Integer and Floating Point Matrix-Vector Multiplication on the Reconfigurable Mesh.

Jerry L. Trahan, Chun-ming Lu, Ramachandran Vaidyanathan

Proceedings of IPPS '96, 1996

1995

Bus-Based Networks for Fan-In and Uniform Hypercube Algorithms.

Ramachandran Vaidyanathan, Anand Padmanabhan

Parallel Comput., 1995

Parallel Integer Sorting Using Small Operations.

Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney

Acta Informatica, 1995

1994

Constant Time Graph and Poset Algorithms on the Reconfigurable Multiple Bus Machine.

Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman

Proceedings of the 1994 International Conference on Parallel Processing, 1994

1993

Optimal Simulation of Multidimensional Reconfigurable Meshes by Two-Dimensional Reconfigurable Meshes.

Ramachandran Vaidyanathan, Jerry L. Trahan

Inf. Process. Lett., 1993

Running ASCEND, DESCEND and PIPELINE Algorithms in Parallel Using Small Processors.

Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney

Inf. Process. Lett., 1993

Towards Optimal Parallel Radix Sorting.

Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney

Proceedings of the Seventh International Parallel Processing Symposium, 1993

List Ranking and Graph Algorithms on the Reconfigurable Multiple Bus Machine.

Chittur Subbaraman, Jerry L. Trahan, Ramachandran Vaidyanathan

Proceedings of the 1993 International Conference on Parallel Processing, 1993

Bus-Based Tree Structures for Efficient Parallel Computation.

Omkar M. Dighe, Ramachandran Vaidyanathan, Si-Qing Zheng

Proceedings of the 1993 International Conference on Parallel Processing, 1993

A potential-driven approach to constructing rectilinear Steiner trees.

S. C. Gadre, Ramachandran Vaidyanathan, Si-Qing Zheng

Proceedings of the Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1993

1992

PRAMs with Variable Word-Size.

Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney

Inf. Process. Lett., 1992

Sorting on PRAMs with Reconfigurable Buses.

Ramachandran Vaidyanathan

Inf. Process. Lett., 1992