Rakesh Vattikonda

According to our database1, Rakesh Vattikonda authored at least 7 papers between 2006 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2008
Scalable model for predicting the effect of negative bias temperature instability for reliable design.
IET Circuits Devices Syst., 2008

2007
A New Simulation Method for NBTI Analysis in SPICE Environment.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

The Impact of NBTI on the Performance of Combinational and Sequential Circuits.
Proceedings of the 44th Design Automation Conference, 2007

An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
SRAM Cell Optimization for Ultra-Low Power Standby.
J. Low Power Electron., 2006

Modeling and minimization of PMOS NBTI effect for robust nanometer design.
Proceedings of the 43rd Design Automation Conference, 2006

Predictive Modeling of the NBTI Effect for Reliable Design.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006


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