Rakesh Komuravelli

Orcid: 0009-0009-0996-3907

According to our database1, Rakesh Komuravelli authored at least 18 papers between 2009 and 2023.

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Bibliography

2023

2022
Learning to Collide: Recommendation System Model Compression with Learned Hash Functions.
CoRR, 2022

Understanding data storage and ingestion for large-scale deep recommendation model training: industrial product.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022


2021
Understanding and Co-designing the Data Ingestion Pipeline for Industry-Scale RecSys Training.
CoRR, 2021

High-performance, Distributed Training of Large-scale Deep Learning Recommendation Models.
CoRR, 2021

2018
HPVM: heterogeneous parallel virtual machine.
Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018

2016
GSI: A GPU Stall Inspector to characterize the sources of memory stalls for tightly coupled GPUs.
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

POSTER: hVISC: A Portable Abstraction for Heterogeneous Parallel Systems.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
Eliminating on-chip traffic waste: are we there yet?
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Stash: have your scratchpad and cache it too.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Exploiting software information for an efficient memory hierarchy
PhD thesis, 2014

Revisiting the Complexity of Hardware Cache Coherence and Some Implications.
ACM Trans. Archit. Code Optim., 2014

DeNovoND: Efficient Hardware for Disciplined Nondeterminism.
IEEE Micro, 2014

2013
DeNovoND: efficient hardware support for disciplined non-determinism.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2013

2011
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
Parallel SAH k-D tree construction.
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2010, 2010

2009
A type and effect system for deterministic parallel Java.
Proceedings of the 24th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2009


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