Rajsekhar Adapa
According to our database1,
Rajsekhar Adapa
authored at least 9 papers
between 2006 and 2011.
Collaborative distances:
Collaborative distances:
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Bibliography
2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008
2007
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Function-Based Test Generation for (Non-Robust) Path Delay Faults Using the Launch-off-Capture Scan Architecture.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006