Rajeshwari Pandey
Orcid: 0000-0002-7539-7888
According to our database1,
Rajeshwari Pandey
authored at least 19 papers
between 2011 and 2024.
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Bibliography
2024
J. Circuits Syst. Comput., August, 2024
Physics-based analytical model for trap assisted biosensing in dual cavity negative capacitance junctionless accumulation mode FET.
Microelectron. J., January, 2024
2023
VDTA Based Unified Grounded Fractional/Integer Order Negative/Positive Inductance Emulator.
J. Circuits Syst. Comput., December, 2023
A Novel Chaotic System with Exponential Nonlinearity and its Adaptive Self-Synchronization: From Numerical Simulations to Circuit Implementation.
J. Circuits Syst. Comput., November, 2023
2022
J. Circuits Syst. Comput., 2022
J. Circuits Syst. Comput., 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Int. J. Circuit Theory Appl., 2021
2019
Operational Transresistance Amplifier Based Wienbridge Oscillator and Its Harmonic Analysis.
Wirel. Pers. Commun., 2019
New sinusoidal oscillator configurations using operational transresistance amplifier.
Int. J. Circuit Theory Appl., 2019
Int. J. Circuit Theory Appl., 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2016
IET Circuits Devices Syst., 2016
2015
IET Circuits Devices Syst., 2015
2014
Int. J. Circuit Theory Appl., 2014
2011
J. Electr. Comput. Eng., 2011
J. Electr. Comput. Eng., 2011