Rajesh Amratlal Thakker

According to our database, Rajesh Amratlal Thakker authored at least 21 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Pan-Sharpening for Spectral Details Preservation Via Convolutional Sparse Coding in Non-Subsampled Shearlet Space.

Dhara J. Sangani, Rajesh Amratlal Thakker, Sumankumar D. Panchal, Rajesh Gogineni

Int. J. Image Graph., March, 2023

2021

Accelerating Parameter Extraction of PSP MOSFET Model on SoC Platform.

Amit Rathod, Rajesh Amratlal Thakker, A. Amalin Prince

J. Circuits Syst. Comput., 2021

Parameter extraction of PSP MOSFET model using particle swarm optimisation.

Amit Rathod, Rajesh Amratlal Thakker

Int. J. Comput. Aided Eng. Technol., 2021

2019

Parameter Space Exploration for Analog Circuit Design Using Enhanced Bee Colony Algorithm.

Subhash J. Patel, Rajesh Amratlal Thakker

J. Circuits Syst. Comput., 2019

Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures.

Manan Mewada, Mazad Zaveri, Rajesh Amratlal Thakker

Integr., 2019

AGDC: Automatic Garbage Detection and Collection.

Siddhant Bansal, Seema Patel, Ishita Shah, Alpesh Patel, Jagruti Makwana, Rajesh Amratlal Thakker

CoRR, 2019

Parasitic-Aware Automatic Analog CMOS Circuit Design Environment.

Subhash Jagadishchandra Patel, Rajesh Amratlal Thakker

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018

Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technology.

Mitesh Limachia, Dixit Vyas, Rajesh Amratlal Thakker, Nikhil Kothari

Integr., 2018

A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technology.

Mitesh Limachia, Rajesh Amratlal Thakker, Nikhil Kothari

Integr., 2018

Parasitic Aware Automatic Analog CMOS Circuit Design Environment Using ABC Algorithm.

Subhash J. Patel, Rajesh Amratlal Thakker

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Parameter Extraction of PSP MOSFET Model Using Particle Swarm Optimization - SoC Approach.

Amit Rathod, Rajesh Amratlal Thakker

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

2017

Characterization of a Novel 10T Low-Voltage SRAM Cell with High Read and Write Margin for 20nm FinFET Technology.

Mitesh Limachia, Pathik Viramgama, Rajesh Amratlal Thakker, Nikhil Kothari

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2015

Implementation and comparative quantitative assessment of different multispectral image pansharpening approches.

Shailesh Panchal, Rajesh Amratlal Thakker

CoRR, 2015

2011

A novel architecture for improving slew rate in FinFET-based op-amps and OTAs.

Rajesh Amratlal Thakker, Mayank Srivastava, Ketankumar H. Tailor, Maryam Shojaei Baghini, Dinesh Kumar Sharma, V. Ramgopal Rao, Mahesh B. Patil

Microelectron. J., 2011

2010

A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit Performance.

Rajesh Amratlal Thakker, Chaitanya Sathe, Maryam Shojaei Baghini, Mahesh B. Patil

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework.

Angada B. Sachid, Rajesh Amratlal Thakker, Chaitanya Sathe, Maryam Shojaei Baghini, Dinesh Kumar Sharma, V. Ramgopal Rao, Mahesh B. Patil

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009

A Novel Table-Based Approach for Design of FinFET Circuits.

Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Automatic Design of Low-Power Low-Voltage Analog Circuits Using Particle Swarm Optimization with Re-Initialization.

Rajesh Amratlal Thakker, Maryam Shojaei Baghini, Mahesh B. Patil

J. Low Power Electron., 2009

Parameter extraction for PSP MOSFET model using hierarchical particle swarm optimization.

Rajesh Amratlal Thakker, Mahesh B. Patil, K. G. Anil

Eng. Appl. Artif. Intell., 2009

Low-Power Low-Voltage Analog Circuit Design Using Hierarchical Particle Swarm Optimization.

Rajesh Amratlal Thakker, Maryam Shojaei Baghini, Mahesh B. Patil

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

Automated design and optimization of circuits in emerging technologies.

Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009