Rajeev Ranjan

Affiliations:
  • Jasper Design Automation, Mountain View, CA, USA
  • Synopsys Inc., Mountain View, CA, USA (former)
  • University of California at Berkeley, CA, USA (former)


According to our database1, Rajeev Ranjan authored at least 13 papers between 1994 and 2009.

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Bibliography

2009
Beyond verification: leveraging formal for debugging.
Proceedings of the 46th Design Automation Conference, 2009

2002
Formal verification methods: getting around the brick wall.
Proceedings of the 39th Design Automation Conference, 2002

1999
Using Combinational Verification for Sequential Circuits.
Proceedings of the 1999 Design, 1999

1998
On the optimization power of retiming and resynthesis transformations.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

A Performance Study of BDD-Based Model Checking.
Proceedings of the Formal Methods in Computer-Aided Design, 1998

A Comparison of Presburger Engines for EFSM Reachability.
Proceedings of the Computer Aided Verification, 10th International Conference, 1998

1997
Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Benchmarking and Analysis of Architectures for CAD Applications.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996
Binary decision diagrams on network of workstation.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996


High Performance BDD Package By Exploiting Memory Hiercharchy.
Proceedings of the 33st Conference on Design Automation, 1996


1994
HSIS: A BDD-Based Environment for Formal Verification.
Proceedings of the 31st Conference on Design Automation, 1994


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