Rajeev Narayanan

According to our database1, Rajeev Narayanan authored at least 6 papers between 2010 and 2013.

Collaborative distances:

Timeline

2010
2011
2012
2013
0
1
2
3
1
1
2
1
1

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Links

On csauthors.net:

Bibliography

2013
Statistical Run-Time Verification of Analog Circuits in Presence of Noise and Process Variation.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
Using LCSS algorithm for circuit level verification of analog designs.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Verifying jitter in an analog and mixed signal design using dynamic time warping.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Ensuring correctness of analog circuits in presence of noise and process variations using pattern matching.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Using Stochastic Differential Equation for Verification of Noise in Analog/RF Circuits.
J. Electron. Test., 2010

Formal verification of analog circuits in the presence of noise and process variation.
Proceedings of the Design, Automation and Test in Europe, 2010


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