Rajeev Jain
Orcid: 0000-0001-9014-2843
According to our database1,
Rajeev Jain
authored at least 54 papers
between 1984 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1999, "For contributions to computer-aided design tools for signal processing circuits.".
Timeline
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On csauthors.net:
Bibliography
2024
Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the International Conference on Artificial Intelligence and Statistics, 2024
2023
Framework and Methodology for Verification of a Complex Scientific Simulation Software, Flash-X.
CoRR, 2023
An Automation Framework for Comparison of Cancer Response Models Across Configurations.
Proceedings of the 19th IEEE International Conference on e-Science, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Int. J. High Perform. Comput. Appl., 2022
From System-on-Chip (SoC) to System on Multi-Chip (SoMC) architectures: Scaling integrated systems beyond the limitations of deep-submicron single chip technologies.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE/ACM International Parallel Data Systems Workshop, 2022
2021
CoRR, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
2020
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020
2018
CANDLE/Supervisor: a workflow framework for machine learning applied to cancer research.
BMC Bioinform., 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Kano integrated robust design approach for aesthetical product design: a case study of a car profile.
J. Intell. Manuf., 2017
2014
Using data mining synergies for evaluating criteria at pre-qualification stage of supplier selection.
J. Intell. Manuf., 2014
A Kano model, AHP and M-TOPSIS method-based technique for disassembly line balancing under fuzzy environment.
Appl. Soft Comput., 2014
2013
A heuristic approach for U-shaped assembly line balancing to improve labor productivity.
Comput. Ind. Eng., 2013
Proceedings of the 22nd International Meshing Roundtable, 2013
2012
Creating geometry and mesh models for nuclear reactor core geometries using a lattice hierarchy-based approach.
Eng. Comput., 2012
A New Heuristic for Disassembly Line Balancing Problems with AND/OR Precedence Relations.
Proceedings of the Second International Conference on Soft Computing for Problem Solving, 2012
2009
Spectrum Sensing Design Framework Based on Cross-Layer Optimization of Detection Efficiency.
Proceedings of IEEE International Conference on Communications, 2009
1999
Proceedings of the Parallel and Distributed Processing, 1999
1998
IEEE J. Solid State Circuits, 1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
1997
1996
J. VLSI Signal Process., 1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
A low power architecture for wireless multimedia systems: lessons learned from building a power hog.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
1995
J. VLSI Signal Process., 1995
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995
1994
A single-chip 12.7 Mchips/s digital IF BPSK direct sequence spread-spectrum transceiver in 1.2 μm CMOS.
IEEE J. Solid State Circuits, December, 1994
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994
1993
Performance Analysis of an All-Digital BPSK Direct-Sequence Spread-Spectrum IF Receiver Architecture.
IEEE J. Sel. Areas Commun., 1993
Proceedings of the Sixth International Conference on VLSI Design, 1993
1992
An integrated circuit design for pruned tree-search vector quantization encoding with an off-chip controller.
IEEE Trans. Circuits Syst. Video Technol., 1992
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992
Hi-PASS: a computer-aided synthesis system for maximally parallel digital signal processing ASICs.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992
Proceedings of the IEEE Data Compression Conference, 1992
1991
FIRGEN: a computer-aided design system for high performance FIR filter integrated circuits.
IEEE Trans. Signal Process., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
Proceedings of the 1991 International Conference on Acoustics, 1991
1990
Proceedings of the 1990 International Conference on Acoustics, 1990
1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
1988
Architectural strategies for an application-specific synchronous multiprocessor environment.
IEEE Trans. Acoust. Speech Signal Process., 1988
Proceedings of the IEEE International Conference on Acoustics, 1988
1986
Proceedings of the IEEE International Conference on Acoustics, 1986
1985
Proceedings of the IEEE International Conference on Acoustics, 1985
1984
Efficient CAD tools for the coefficient optimisation of arbitrary integrated digital filters.
Proceedings of the IEEE International Conference on Acoustics, 1984