Rajeev J. Ram

Affiliations:
  • Massachusetts Institute of Technology, Cambridge, USA


According to our database1, Rajeev J. Ram authored at least 21 papers between 2008 and 2020.

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Bibliography

2020
Bayesian modeling and computation for analyte quantification in complex mixtures using Raman spectroscopy.
Comput. Stat. Data Anal., 2020

2018
Monolithic Optical Transceivers in 65 nm Bulk CMOS.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

2017
A 40-Gb/s PAM-4 Transmitter Based on a Ring-Resonator Optical DAC in 45-nm SOI CMOS.
IEEE J. Solid State Circuits, 2017


29.3 A 40Gb/s PAM-4 transmitter based on a ring-resonator optical DAC in 45nm SOI CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A Thin Silicon Photonic Platform for Telecommunication Wavelengths.
Proceedings of the European Conference on Optical Communication, 2017

2016
A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning.
IEEE J. Solid State Circuits, 2016

Depletion-based optical modulators in a bulk 65 nm CMOS platform.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

Ultra-efficient CMOS fiber-to-chip grating couplers.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

A high-speed photodetector for telecom, ethernet, and FTTH applications in zero-change CMOS process.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

Zero-change CMOS photodiode with 0.44 A/W responsivity.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

Energy consumption of communication systems using integrated nanophotonic devices.
Proceedings of the 18th International Conference on Transparent Optical Networks, 2016

2015
Single-chip microprocessor that communicates directly using light.
Nat., 2015

A Monolithically-Integrated Chip-to-Chip Optical Link in Bulk CMOS.
IEEE J. Solid State Circuits, 2015

A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning.
Proceedings of the Symposium on VLSI Circuits, 2015

2014
A monolithically-integrated optical transmitter and receiver in a zero-change 45nm SOI process.
Proceedings of the Symposium on VLSI Circuits, 2014

Energy-efficient active photonics in a zero-change, state-of-the-art CMOS process.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

2013
A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A Monolithically-Integrated Optical Receiver in Standard 45-nm SOI.
IEEE J. Solid State Circuits, 2012

2009
Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics.
IEEE Micro, 2009

2008
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics.
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008


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