Rajeev Barua

According to our database, Rajeev Barua authored at least 60 papers between 1996 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

RL-BIN++: Overcoming Binary Instrumentation Challenges in the Presence of Obfuscation Techniques and Problematic Features.

Amir Majlesi-Kupaei, Danny Kim, Rajeev Barua

Proceedings of the ICSCA 2021, 2021

2018

Easy PRAM-Based High-Performance Parallel Programming with ICE.

Fady Ghanim, Uzi Vishkin, Rajeev Barua

IEEE Trans. Parallel Distributed Syst., 2018

A Hybrid Static Tool to Increase the Usability and Scalability of Dynamic Detection of Malware.

Danny Kim, Daniel Mirsky, Amir Majlesi-Kupaei, Rajeev Barua

Proceedings of the 13th International Conference on Malicious and Unwanted Software, 2018

2017

DynODet: Detecting Dynamic Obfuscation in Malware.

Danny Kim, Amir Majlesi-Kupaei, Julien Roy, Kapil Anand, Khaled ElWazeer, Daniel Buettner, Rajeev Barua

Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2017

RL-Bin, Robust Low-overhead Binary Rewriter.

Amir Majlesi-Kupaei, Danny Kim, Kapil Anand, Khaled ElWazeer, Rajeev Barua

Proceedings of the 2017 Workshop on Forming an Ecosystem Around Software Transformation, 2017

2016

A Stack Memory Abstraction and Symbolic Analysis Framework for Executables.

Kapil Anand, Khaled Elwazeer, Aparna Kotha, Matthew Smithson, Rajeev Barua, Angelos D. Keromytis

ACM Trans. Softw. Eng. Methodol., 2016

Transparently Space Sharing a Multicore Among Multiple Processes.

Timothy Creech, Rajeev Barua

ACM Trans. Parallel Comput., 2016

POSTER: Easy PRAM-based High-Performance Parallel Programming with ICE.

Fady Ghanim, Rajeev Barua, Uzi Vishkin

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

Affine Parallelization Using Dependence and Cache Analysis in a Binary Rewriter.

Aparna Kotha, Kapil Anand, Timothy Creech, Khaled Elwazeer, Matthew Smithson, Greeshma Yellareddy, Rajeev Barua

IEEE Trans. Parallel Distributed Syst., 2015

Instruction-Cache Locking for Improving Embedded Systems Performance.

Kapil Anand, Rajeev Barua

ACM Trans. Embed. Comput. Syst., 2015

2014

Lazy Scheduling: A Runtime Adaptive Scheduler for Declarative Parallelism.

Alexandros Tzannes, George C. Caragea, Uzi Vishkin, Rajeev Barua

ACM Trans. Program. Lang. Syst., 2014

Affine Loop Optimization Based on Modulo Unrolling in Chapel.

Aroon Sharma, Darren Smith, Joshua Koehler, Rajeev Barua, Michael Ferguson

Proceedings of the 8th International Conference on Partitioned Global Address Space Programming Models, 2014

Affine Parallelization of Loops with Run-Time Dependent Bounds from Binaries.

Aparna Kotha, Kapil Anand, Timothy Creech, Khaled Elwazeer, Matthew Smithson, Rajeev Barua

Proceedings of the Programming Languages and Systems, 2014

Recovery of Object Oriented Features from C++ Binaries.

Kyungjin Yoo, Rajeev Barua

Proceedings of the 21st Asia-Pacific Software Engineering Conference, 2014

2013

MemSafe: ensuring the spatial and temporal memory safety of C at runtime.

Matthew S. Simpson, Rajeev Barua

Softw. Pract. Exp., 2013

Implementation and performance evaluation of a distributed conjugate gradient method in a cloud computing environment.

Leila Ismail, Rajeev Barua

Softw. Pract. Exp., 2013

Static binary rewriting without supplemental information: Overcoming the tradeoff between coverage and correctness.

Matthew Smithson, Khaled Elwazeer, Kapil Anand, Aparna Kotha, Rajeev Barua

Proceedings of the 20th Working Conference on Reverse Engineering, 2013

Scalable variable and data type detection in a binary rewriter.

Khaled Elwazeer, Kapil Anand, Aparna Kotha, Matthew Smithson, Rajeev Barua

Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

Efficient multiprogramming for multicores with SCAF.

Timothy Creech, Aparna Kotha, Rajeev Barua

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

An Accurate Stack Memory Abstraction and Symbolic Analysis Framework for Executables.

Kapil Anand, Khaled Elwazeer, Aparna Kotha, Matthew Smithson, Rajeev Barua, Angelos D. Keromytis

Proceedings of the 2013 IEEE International Conference on Software Maintenance, 2013

A compiler-level intermediate representation based binary analysis and rewriting system.

Kapil Anand, Matthew Smithson, Khaled Elwazeer, Aparna Kotha, Jim Gruen, Nathan Giles, Rajeev Barua

Proceedings of the Eighth Eurosys Conference 2013, 2013

2011

Resource-Aware Compiler Prefetching for Fine-Grained Many-Cores.

George C. Caragea, Alexandros Tzannes, Fuat Keceli, Rajeev Barua, Uzi Vishkin

Int. J. Parallel Program., 2011

Retrofitting Security in COTS Software with Binary Rewriting.

Pádraig O'Sullivan, Kapil Anand, Aparna Kotha, Matthew Smithson, Rajeev Barua, Angelos D. Keromytis

Proceedings of the Future Challenges in Security and Privacy for Academia and Industry, 2011

Toolchain for Programming, Simulating and Studying the XMT Many-Core Architecture.

Fuat Keceli, Alexandros Tzannes, George C. Caragea, Rajeev Barua, Uzi Vishkin

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Improving Run-Time Scheduling for General-Purpose Parallel Code.

Alexandros Tzannes, Rajeev Barua, Uzi Vishkin

Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010

Lazy binary-splitting: a run-time adaptive work-stealing scheduler.

Alexandros Tzannes, George C. Caragea, Rajeev Barua, Uzi Vishkin

Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

Automatic Parallelization in a Binary Rewriter.

Aparna Kotha, Kapil Anand, Matthew Smithson, Greeshma Yellareddy, Rajeev Barua

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

Resource-Aware Compiler Prefetching for Many-Cores.

George C. Caragea, Alexandros Tzannes, Fuat Keceli, Rajeev Barua, Uzi Vishkin

Proceedings of the Ninth International Symposium on Parallel and Distributed Computing, 2010

2009

Memory allocation for embedded systems with a compile-time-unknown scratch-pad size.

Nghi Nguyen, Angel Dominguez, Rajeev Barua

ACM Trans. Embed. Comput. Syst., 2009

Instruction cache locking inside a binary rewriter.

Kapil Anand, Rajeev Barua

Proceedings of the 2009 International Conference on Compilers, 2009

2008

MTSS: Multitask stack sharing for embedded systems.

Bhuvan Middha, Matthew S. Simpson, Rajeev Barua

ACM Trans. Embed. Comput. Syst., 2008

2007

Scratch-pad memory allocation without compiler support for java applications.

Nghi Nguyen, Angel Dominguez, Rajeev Barua

Proceedings of the 2007 International Conference on Compilers, 2007

Recursive function data allocation to scratch-pad memory.

Angel Dominguez, Nghi Nguyen, Rajeev Barua

Proceedings of the 2007 International Conference on Compilers, 2007

2006

Dynamic allocation for scratch-pad memory using compile-time decisions.

Sumesh Udayakumaran, Angel Dominguez, Rajeev Barua

ACM Trans. Embed. Comput. Syst., 2006

Memory overflow protection for embedded systems using run-time checks, reuse, and compression.

Surupa Biswas, Thomas W. Carley, Matthew S. Simpson, Bhuvan Middha, Rajeev Barua

ACM Trans. Embed. Comput. Syst., 2006

An integrated scratch-pad allocator for affine and non-affine code.

Sumesh Udayakumaran, Rajeev Barua

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Dynamic Functional Unit Assignment for Low Power.

Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu

J. Supercomput., 2005

Reducing code size in VLIW instruction scheduling.

Steve Haga, Andrew Webber, Yi Zhang, Nghi Nguyen, Rajeev Barua

J. Embed. Comput., 2005

Heap data allocation to scratch-pad memory in embedded systems.

Angel Dominguez, Sumesh Udayakumaran, Rajeev Barua

J. Embed. Comput., 2005

Segment protection for embedded systems using run-time checks.

Matthew S. Simpson, Bhuvan Middha, Rajeev Barua

Proceedings of the 2005 International Conference on Compilers, 2005

MTSS: multi task stack sharing for embedded systems.

Bhuvan Middha, Matthew S. Simpson, Rajeev Barua

Proceedings of the 2005 International Conference on Compilers, 2005

2004

Execution History Guided Instruction Prefetching.

Yi Zhang, Steve Haga, Rajeev Barua

J. Supercomput., 2004

Memory overflow protection for embedded systems using run-time checks, reuse and compression.

Surupa Biswas, Matthew S. Simpson, Rajeev Barua

Proceedings of the 2004 International Conference on Compilers, 2004

2003

Contention-Free Periodic Message Scheduler Medium Access Control in Wireless Sensor / Actuator Networks.

Thomas W. Carley, Moussa A. Ba, Rajeev Barua, David B. Stewart

Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 2003

Compiler-decided dynamic memory allocation for scratch-pad based embedded systems.

Sumesh Udayakumaran, Rajeev Barua

Proceedings of the International Conference on Compilers, 2003

Dynamic Functional Unit Assignment for Low Power.

Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu

Proceedings of the Embedded Software for SoC, 2003

2002

An optimal memory allocation scheme for scratch-pad-based embedded systems.

Oren Avissar, Rajeev Barua, Dave Stewart

ACM Trans. Embed. Comput. Syst., 2002

Compiler-directed customization of ASIP cores.

T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua

Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2001

Compiler Support for Scalable and Efficient Memory Systems.

Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal

IEEE Trans. Computers, 2001

Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors.

Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan

Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001

Heterogeneous memory management for embedded systems.

Oren Avissar, Rajeev Barua, Dave Stewart

Proceedings of the 2001 International Conference on Compilers, 2001

2000

Compiler-managed memory system for software-exposed architectures.

Rajeev Barua

PhD thesis, 2000

1999

Maps: A Compiler-Managed Memory System for Raw Machines.

Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Parallelizing Applications into Silicon.

Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew I. Frank, Rajeev Barua, Saman P. Amarasinghe

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998

The Sensitivity of Communication Mechanisms to Bandwidth and Latency.

Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal

Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

Memory bank disambiguation using modulo unrolling for Raw machines.

Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal

Proceedings of the 5th International Conference On High Performance Computing, 1998

Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine.

Walter Lee, Rajeev Barua, Matthew I. Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe

Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1997

Baring It All to Software: Raw Machines.

Elliot Waingold, Michael B. Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew I. Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal

Computer, 1997

The RAW benchmark suite: computation structures for general purpose computing.

Jonathan Babb, Matthew I. Frank, Victor Lee, Elliot Waingold, Rajeev Barua, Michael B. Taylor, Jang Kim, Devabhaktuni Srikrishna, Anant Agarwal

Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1996

Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors.

Rajeev Barua, David A. Kranz, Anant Agarwal

Proceedings of the Languages and Compilers for Parallel Computing, 1996