Rajath Vasudevamurthy

According to our database, Rajath Vasudevamurthy authored at least 5 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2022

Pulse-width Modulation Technique for Generation of Multiple Analog Voltages for On-chip Calibration.

Rajath Vasudevamurthy

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

2014

Time-Based All-Digital Technique for Analog Built-in Self-Test.

Rajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj Amrutur

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Multiphase Technique to Speed-up Delay Measurement via Sub-sampling.

Rajath Vasudevamurthy, Bharadwaj Amrutur

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

2011

0.84 ps Resolution Clock Skew Measurement via Subsampling.

Bharadwaj Amrutur, Pratap Kumar Das, Rajath Vasudevamurthy

IEEE Trans. Very Large Scale Integr. Syst., 2011

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test.

Rajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj Amrutur

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011