Rajasekhar Pullela

According to our database1, Rajasekhar Pullela authored at least 9 papers between 1994 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009


2006
Low Flicker-Noise Quadrature Mixer Topology.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2004
Quad-band GSM/GPRS/EDGE polar loop transmitter.
IEEE J. Solid State Circuits, 2004

2002
Clock and data recovery IC for 40-Gb/s fiber-optic receiver.
IEEE J. Solid State Circuits, 2002

2001
A fully integrated 40-Gb/s clock and data recovery IC with 1: 4 DEMUX in SiGe technology.
IEEE J. Solid State Circuits, 2001

1999
48-GHz digital ICs and 85-GHz baseband amplifiers using transferred-substrate HBT's.
IEEE J. Solid State Circuits, 1999

1996
Multiplexer/demultiplexer IC technology for 100 Gb/s fiber-optic transmission.
IEEE J. Solid State Circuits, 1996

1994
Active and nonlinear wave propagation devices in ultrafast electronics and optoelectronics.
Proc. IEEE, 1994


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