Rainier van Dommele

Orcid: 0000-0003-1566-7273

According to our database1, Rainier van Dommele authored at least 7 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
A 23-GHz TX/LNA Front-End Module for Inter-Satellite Links With 27.8% Peak Efficiency in the TX Path and 3.1-dB NF in the RX Path.
IEEE J. Solid State Circuits, November, 2024

2019
A DC-51.5 GHz Electro-Absorption Modulator Driver with Tunable Differential DC Coupling for 3D Wafer Scale Packaging.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2016
A106nW 10 b 80 kS/s SAR ADC With Duty-Cycled Reference Generation in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

A 0.20 mm<sup>2</sup> 3 nW Signal Acquisition IC for Miniature Sensor Nodes in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

Poster: Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS.
Proceedings of the Symposium on Communications and Vehicular Technologies, 2016

2015
15.4 A 0.8V 10b 80kS/s SAR ADC with duty-cycled reference generation.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

21.2 A 3nW signal-acquisition IC integrating an amplifier with 2.1 NEF and a 1.5fJ/conv-step ADC.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015


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