Rainer Waser
Orcid: 0000-0002-9080-8980
According to our database1,
Rainer Waser
authored at least 52 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Neuromorph. Comput. Eng., 2024
Synaptogen: A cross-domain generative device model for large-scale neuromorphic circuit design.
CoRR, 2024
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
Neuromorph. Comput. Eng., December, 2023
Neuromorph. Comput. Eng., September, 2023
Neuromorph. Comput. Eng., June, 2023
it Inf. Technol., May, 2023
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023
Proceedings of the Neuro-Inspired Computational Elements Conference, 2023
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023
Advanced Electrical Characterization of Memristive Arrays for Neuromorphic Applications.
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023
Proceedings of the Device Research Conference, 2023
2022
Neuromorph. Comput. Eng., 2022
CoRR, 2022
Proceedings of the IEEE International Test Conference in Asia, 2022
Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Analysis of VMM Operations on 1S1R Crossbar Arrays and the Influence of Wire Resistances.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Memory Workshop, 2021
An Ag/HfO2/Pt Threshold Switching Device with an Ultra-Low Leakage ( 1011), and Low Threshold Voltage (< 0.2 V) for Energy-Efficient Neuromorphic Computing.
Proceedings of the IEEE International Memory Workshop, 2021
2020
Variability-Aware Modeling of Filamentary Oxide-Based Bipolar Resistive Switching Cells Using SPICE Level Compact Models.
IEEE Trans. Circuits Syst., 2020
In-Memory Binary Vector-Matrix Multiplication Based on Complementary Resistive Switches.
Adv. Intell. Syst., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the European Conference on Circuit Theory and Design, 2020
2019
Proceedings of the International Conference on Neuromorphic Systems, 2019
2018
The influence of interfacial (sub)oxide layers on the properties of pristine resistive switching devices.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
Atomistic Investigation of the Schottky Contact Conductance Limits at SrTiO3 based Resistive Switching Devices.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Thermal effects on the I-V characteristics of filamentary VCM based ReRAM-cells using a nanometer-sized heater.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017
2016
Int. J. Unconv. Comput., 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Energy dissipation during pulsed switching of strontium-titanate based resistive switching memory devices.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Controllability of multi-level states in memristive device models using a transistor as current compliance during SET operation.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015
2014
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model.
Microelectron. J., 2014
Simulation of TaOx-based complementary resistive switches by a physics-based memristive model.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Weibull analysis of the kinetics of resistive switches based on tantalum oxide thin films.
Proceedings of the European Solid-State Device Research Conference, 2013
2012
Scaling Potential of Local Redox Processes in Memristive SrTiO<sub>3</sub> Thin-Film Devices.
Proc. IEEE, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2010
2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2006
Microelectron. J., 2006