Rainer Findenig

According to our database, Rainer Findenig authored at least 12 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Miniaturized Advanced Driver Assistance Systems: A Low-Cost Educational Platform for Advanced Driver Assistance Systems and Autonomous Driving.

Michael Gerstmair, Martin Gschwandtner, Rainer Findenig, Oliver Lang, Alexander Melzer, Mario Huemer

IEEE Signal Process. Mag., 2021

2020

Lego Radar Train - An Educational Workshop on Radar-based Advanced Driver Assistance Systems.

Michael Gerstmair, Martin Gschwandtner, Rainer Findenig, Alexander Melzer, Mario Huemer

Proceedings of the 28th European Signal Processing Conference, 2020

2017

Python based framework for HDSLs with an underlying formal semantics: (Invited paper).

Keerthikumara Devarajegowda, Johannes Schreiner, Rainer Findenig, Wolfgang Ecker

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2016

Design centric modeling of digital hardware.

Johannes Schreiner, Rainer Findenig, Wolfgang Ecker

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2016

2013

Transaction-Level Modeling and Refinement Using State Charts.

Rainer Findenig, Thomas Leitner, Wolfgang Ecker

Proceedings of the Computer Aided Systems Theory - EUROCAST 2013, 2013

2012

Single-source hardware modeling of different abstraction levels with State Charts.

Rainer Findenig, Thomas Leitner, Wolfgang Ecker

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

2010

State chart refinement validation from approximately timed to cycle callable models.

Rainer Findenig, Wolfgang Ecker

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Fast and accurate UML State Chart modeling using TLM⁺ control flow abstraction.

Rainer Findenig, Thomas Leitner, Michael Velten, Wolfgang Ecker

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Model reduction techniques for the formal verification of hardware dependent software.

Wolfgang Ecker, Volkan Esen, Rainer Findenig, Thomas Steininger, Michael Velten

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

2009

Optimizing the Hardware Usage of Parallel FSMs.

Rainer Findenig, Florian Eibensteiner, Markus Pfaff

Proceedings of the Computer Aided Systems Theory, 2009

SynPSL: Behavioral Synthesis of PSL Assertions.

Florian Eibensteiner, Rainer Findenig, Markus Pfaff

Proceedings of the Computer Aided Systems Theory, 2009

2007

Embedded Robotic Solution: Integrating Robotics Interfaces with a High-Level CPU in a System-on-a-Chip.

Florian Eibensteiner, Rainer Findenig, Jürgen Tossold, Wilfried Kubinger, Josef Langer, Markus Pfaff

Proceedings of the Computer Aided Systems Theory, 2007