Rainer Dömer

According to our database, Rainer Dömer authored at least 91 papers between 1994 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention.

Emad Malekzadeh Arasteh, Rainer Dömer

ACM Trans. Embed. Comput. Syst., September, 2024

BusyMap, an Efficient Data Structure to Observe Interconnect Contention in SystemC TLM-2.0.

Emad Malekzadeh Arasteh, Vivek Govindasamy, Rainer Dömer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture.

Lars Luchterhandt, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Mueller, Babak Sadiye

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2023

Instruction-Level Modeling and Evaluation of a Cache-Less Grid of Processing Cells.

Vivek Govindasamy, Rainer Dömer

Proceedings of the Forum on Specification & Design Languages, 2023

2022

Demonstrating Scalability of the Checkerboard GPC with SystemC TLM-2.0.

Yutong Wang, Arya Daroui, Rainer Dömer

Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022

Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells.

Vivek Govindasamy, Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022

2021

Scaled Static Analysis and IP Reuse for Out-of-Order Parallel SystemC Simulation.

Zhongqi Cheng, Tim Schmidt, Rainer Dömer

Int. J. Parallel Program., 2021

Improving Parallelism in System Level Models by Assessing PDES Performance.

Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the 24th Forum on specification & Design Languages, 2021

Pushing the Limits of Parallel Discrete Event Simulation for SystemC.

Rainer Dömer, Zhongqi Cheng, Daniel Mendoza, Emad Malekzadeh Arasteh

Proceedings of the A Journey of Embedded and Cyber-Physical Systems, 2021

2020

Lazy Event Prediction using Defining Trees and Schedule Bypass for Out-of-Order PDES.

Daniel Mendoza, Zhongqi Cheng, Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Event Delivery using Prediction for Faster Parallel SystemC Simulation.

Zhongqi Cheng, Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Analyzing Variable Entanglement for Parallel Simulation of SystemC TLM-2.0 Models.

Zhongqi Cheng, Rainer Dömer

ACM Trans. Embed. Comput. Syst., 2019

An Untimed SystemC Model of GoogLeNet.

Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the Analysis, Estimations, and Applications of Embedded Systems, 2019

2018

SystemC Coding Guideline for Faster Out-of-order Parallel Discrete Event Simulation.

Zhongqi Cheng, Tim Schmidt, Rainer Dömer

Proceedings of the 2018 Forum on Specification & Design Languages, 2018

Port call path sensitive conflict analysis for instance-aware parallel SystemC simulation.

Tim Schmidt, Zhongqi Cheng, Rainer Dömer

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

SCE: System-on-Chip Environment.

Gunar Schirner, Andreas Gerstlauer, Rainer Dömer

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Introduction to Hardware/Software Codesign.

Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Parallel Simulation.

Rainer Dömer, Guantao Liu, Tim Schmidt

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Thread- and data-level parallel simulation in SystemC, a Bitcoin miner case study.

Zhongqi Cheng, Tim Schmidt, Guantao Liu, Rainer Dömer

Proceedings of the 2017 IEEE International High Level Design Validation and Test Workshop, 2017

Exploiting Thread and Data Level Parallelism for Ultimate Parallel SystemC Simulation.

Tim Schmidt, Guantao Liu, Rainer Dömer

Proceedings of the 54th Annual Design Automation Conference, 2017

Hybrid analysis of SystemC models for fast and accurate parallel simulation.

Tim Schmidt, Guantao Liu, Rainer Dömer

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Seven Obstacles in the Way of Standard-Compliant Parallel SystemC Simulation.

Rainer Dömer

IEEE Embed. Syst. Lett., 2016

Automatic Generation of Thread Communication Graphs from SystemC Source Code.

Tim Schmidt, Guantao Liu, Rainer Dömer

Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

A segment-aware multi-core scheduler for system C PDES.

Guantao Liu, Tim Schmidt, Rainer Dömer

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2016

2015

May-happen-in-parallel analysis of ESL models using UPPAAL model checking.

Che-Wei Chang, Rainer Dömer

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Optimizing thread-to-core mapping on manycore platforms with distributed Tag Directories.

Guantao Liu, Tim Schmidt, Rainer Dömer, Ajit Dingankar, Desmond Kirkpatrick

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Communication protocol analysis of transaction-level models using Satisfiability Modulo Theories.

Che-Wei Chang, Rainer Dömer

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Out-of-Order Parallel Discrete Event Simulation for Transaction Level Models.

Weiwei Chen, Xu Han, Che-Wei Chang, Guantao Liu, Rainer Dömer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

A program state machine based virtual processing model in SystemC.

Tim Schmidt, Kim Grüttner, Rainer Dömer, Achim Rettberg

SIGBED Rev., 2014

Automated estimation of power consumption for rapid system level design.

Yasaman Samei Syahkal, Rainer Dömer

Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

Powermonitor: a versatile API for automated power-aware ESL design.

Yasaman Samei Syahkal, Rainer Dömer

Proceedings of the 2014 Forum on Specification and Design Languages, 2014

May-happen-in-parallel analysis based on segment graphs for safe ESL models.

Weiwei Chen, Xu Han, Rainer Dömer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Advances in Parallel Discrete Event Simulation for Electronic System-Level Design.

Weiwei Chen, Xu Han, Che-Wei Chang, Rainer Dömer

IEEE Des. Test, 2013

Designer-in-the-loop recoding of ESL models using static parallel access conflict analysis.

Xu Han, Weiwei Chen, Rainer Dömer

Proceedings of the International Workshop on Software and Compilers for Embedded Systems, 2013

Formal Deadlock Analysis of SpecC Models Using Satisfiability Modulo Theories.

Che-Wei Chang, Rainer Dömer

Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013

TECSCE: HW/SW Codesign Framework for Data Parallelism Based on Software Component.

Takuya Azumi, Yasaman Samei Syahkal, Yuko Hara-Azumi, Hiroshi Oyama, Rainer Dömer

Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013

Optimized out-of-order parallel discrete event simulation using predictions.

Weiwei Chen, Rainer Dömer

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Computer-Aided Recoding to Create Structured and Analyzable System Models.

Pramod Chandraiah, Rainer Dömer

ACM Trans. Embed. Comput. Syst., 2012

Eliminating race conditions in system-level models by using parallel simulation infrastructure.

Weiwei Chen, Che-Wei Chang, Xu Han, Rainer Dömer

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

Out-of-order parallel simulation for ESL design.

Weiwei Chen, Xu Han, Rainer Dömer

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Parallel discrete event simulation of Transaction Level Models.

Rainer Dömer, Weiwei Chen, Xu Han

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

An optimizing compiler for out-of-order parallel ESL simulation exploiting instance isolation.

Weiwei Chen, Rainer Dömer

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Multicore Simulation of Transaction-Level Models Using the SoC Environment.

Weiwei Chen, Xu Han, Rainer Dömer

IEEE Des. Test Comput., 2011

Multi-core parallel simulation of System-level Description Languages.

Rainer Dömer, Weiwei Chen, Xu Han, Andreas Gerstlauer

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Fast and accurate processor models for efficient MPSoC design.

Gunar Schirner, Andreas Gerstlauer, Rainer Dömer

ACM Trans. Design Autom. Electr. Syst., 2010

ESL design and multi-core validation using the System-on-Chip Environment.

Weiwei Chen, Xu Han, Rainer Dömer

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Panel Session - Who Is Closing the embedded software design gap?

Wolfgang Ecker, Pierre Bricaud, Rainer Dömer, Yossi Veller, Stefan Heinen, Jürgen Mössinger, Andreas von Schwerin

Proceedings of the Design, Automation and Test in Europe, 2010

System-level development of embedded software.

Gunar Schirner, Andreas Gerstlauer, Rainer Dömer

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Computer-aided recoding for multi-core systems.

Rainer Dömer

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

A fast heuristic scheduling algorithm for periodic ConcurrenC models.

Weiwei Chen, Rainer Dömer

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

A Configurable TLM of Wireless Sensor Networks for Fast Exploration of System Communication Performance.

Ines Viskic, Rainer Dömer

Proceedings of the Analysis, 2009

Efficient Modeling of Embedded Systems Using Computer-Aided Recoding.

Rainer Dömer

Proceedings of the Analysis, 2009

ConcurrenC: A New Approach towards Effective Abstraction of C-Based SLDLs.

Weiwei Chen, Rainer Dömer

Proceedings of the Analysis, 2009

Programming MPSoC platforms: Road works ahead!

Rainer Leupers, Andras Vajda, Marco Bekooij, Soonhoi Ha, Rainer Dömer, Achim Nohl

Proceedings of the Design, Automation and Test in Europe, 2009

Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems.

Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski

IEEE Trans. Very Large Scale Integr. Syst., 2008

Quantitative analysis of the speed/accuracy trade-off in transaction level modeling.

Gunar Schirner, Rainer Dömer

ACM Trans. Embed. Comput. Syst., 2008

Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding.

Pramod Chandraiah, Rainer Dömer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design.

Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski

EURASIP J. Embed. Syst., 2008

Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling.

Gunar Schirner, Rainer Dömer

Proceedings of the Design, Automation and Test in Europe, 2008

Automatic generation of hardware dependent software for MPSoCs from abstract system specifications.

Gunar Schirner, Andreas Gerstlauer, Rainer Dömer

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

Automatic re-coding of reference code into structured and analyzable SoC models.

Pramod Chandraiah, Rainer Dömer

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Result-Oriented Modeling - A Novel Technique for Fast and Accurate TLM.

Gunar Schirner, Rainer Dömer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Automatic Layer-Based Generation of System-On-Chip Bus Communication Models.

Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

An Interactive Design Environment for C-based High-Level Synthesis.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Embedded Software Development in a System-Level Design Flow.

Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

An Interactive Model Re-Coder for Efficient SoC Specification.

Pramod Chandraiah, Rainer Dömer

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification.

Pramod Chandraiah, Rainer Dömer

Proceedings of the 44th Design Automation Conference, 2007

Pointer re-coding for creating definitive MPSoC models.

Pramod Chandraiah, Rainer Dömer

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Abstract, Multifaceted Modeling of Embedded Processors for System Level Design.

Gunar Schirner, Andreas Gerstlauer, Rainer Dömer

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Creating Explicit Communication in SoC Models Using Interactive Re-Coding.

Pramod Chandraiah, Junyu Peng, Rainer Dömer

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Fast and accurate transaction level models using result oriented modeling.

Gunar Schirner, Rainer Dömer

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

A Flexible, Syntax Independent Representation (SIR) for System Level Design Models.

Ines Viskic, Rainer Dömer

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Quantitative analysis of transaction level models for the AMBA bus.

Gunar Schirner, Rainer Dömer

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Automatic generation of transaction level models for rapid design space exploration.

Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Accurate yet fast modeling of real-time communication.

Gunar Schirner, Rainer Dömer

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2005

Software and Driver Synthesis from Transaction Level Models.

Haobo Yu, Rainer Dömer, Daniel D. Gajski

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Automatic Generation of Communication Architectures.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Abstract Communication Modeling.

Gunar Schirner, Rainer Dömer

Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Automatic network generation for system-on-chip communication design.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

System-level communication modeling for network-on-chip synthesis.

Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Embedded software generation from system level design languages.

Haobo Yu, Rainer Dömer, Daniel Gajski

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2002

The Formal Execution Semantics of SpecC.

Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

2001

System Design - A Practical Guide with SpecC.

Andreas Gerstlauer, Rainer Dömer, Junyu Peng, Daniel D. Gajski

Springer, ISBN: 978-0-7923-7387-2, 2001

2000

System-level modeling and design with the SpecC language.

Rainer Dömer

PhD thesis, 2000

Reuse and protection of intellectual property in the SpecC system.

Rainer Dömer, Daniel Gajski

Proceedings of ASP-DAC 2000, 2000

1998

Specification and Design of Embedded Systems.

Rainer Dömer, Daniel D. Gajski, Jianwen Zhu

Informationstechnik Tech. Inform., 1998

IP-Centric Methodology and Specification Language.

Daniel Gajski, Rainer Dömer, Jianwen Zhu

Proceedings of the Distributed and Parallel Embedded Systems, 1998

1997

Built-in chaining: introducing complex components into architectural synthesis.

Peter Marwedel, Birger Landwehr, Rainer Dömer

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis.

Peter Marwedel, Steven Bashford, Rainer Dömer, Birger Landwehr, Ingolf Markhof

Proceedings of the 1996 European Design and Test Conference, 1996

1994

OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming.

Birger Landwehr, Peter Marwedel, Rainer Dömer

Proceedings of the Proceedings EURO-DAC'94, 1994