Rahul R. Patil

According to our database1, Rahul R. Patil authored at least 1 paper in 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Intra mode power saving methodology for CGRA-based reconfigurable processor architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016


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