Rahul Govindan

According to our database, Rahul Govindan authored at least 3 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Novel Design partitioning technique for ASIC prototyping on multi-FPGA platforms using Graph Deep Learning.

Divyasree Tummalapalli, Kunapareddy Chiranjeevi, Vikas Akalwadi, Rahul Govindan, Balaji G

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021

Fault-Tolerant Application-Specific Topology-Based NoC and Its Prototype on an FPGA.

P. Veda Bhanu, Rahul Govindan, Rajat Kumar, Vishal Singh, Soumya J., Linga Reddy Cenkeramaddi

IEEE Access, 2021

Flexible Spare Core Placement in Torus Topology Based NoCs and Its Validation on an FPGA.

P. Veda Bhanu, Rahul Govindan, Plava Kattamuri, Soumya J., Linga Reddy Cenkeramaddi

IEEE Access, 2021