Rahul Bhattacharya

According to our database, Rahul Bhattacharya authored at least 8 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

MATLAB-Simulink based Framework for Combinational ATPG Applied to Testing of Digital Blocks in Analog and Mixed-Signal Circuits.

Puja Kumari, Rahul Bhattacharya

Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2023

MATLAB-Open Source Tool Based Framework for Test Generation for Digital Circuits Using Evolutionary Algorithms.

Priyajit Bhattacharya, Rahul Bhattacharya, Himasree Deka

J. Electron. Test., December, 2023

2022

Introducing flexible perovskites to the IoT world using photovoltaic-powered wireless tags.

Sai Nithin Reddy Kantareddy, Rahul Bhattacharya, Sanjay E. Sarma, Ian Mathews, Janak Thapa, Liu Zhe, Shijing Sun, Ian Marius Peters, Tonio Buonassisi

CoRR, 2022

2017

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.

Rahul Bhattacharya, Subindu Kumar, Santosh Biswas

Int. J. Circuit Theory Appl., 2017

SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis.

Rahul Bhattacharya, S. H. M. Ragamai, Subindu Kumar

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

Characterizing Non-nesting for the Neyman-Pearson Family of Tests.

Rahul Bhattacharya

J. Stat. Theory Appl., 2016

2015

A randomized two stage allocation for continuous response clinical trials.

Rahul Bhattacharya, Madhumita Shome

Stat. Methods Appl., 2015

2010

FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only).

Rahul Bhattacharya, Santosh Biswas, Siddhartha Mukhopadhyay

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010